Development of electrical-erosion instrument for direct write micro-patterning on large area conductive thin films Ángel Luis Álvarez, Carmen Coya, and Miguel García-Vélez
Citation: Review of Scientific Instruments 86, 084704 (2015); doi: 10.1063/1.4928748 View online: http://dx.doi.org/10.1063/1.4928748 View Table of Contents: http://aip.scitation.org/toc/rsi/86/8 Published by the American Institute of Physics
REVIEW OF SCIENTIFIC INSTRUMENTS 86, 084704 (2015)
Development of electrical-erosion instrument for direct write micro-patterning on large area conductive thin films Ángel Luis Álvarez, Carmen Coya, and Miguel García-Vélez Departamento Teoría de la Señal y Comunicaciones, Sistemas Telemáticos y Computación, Escuela Técnica Superior de Ingeniería de Telecomunicación, Universidad Rey Juan Carlos, Fuenlabrada, Madrid 28943, Spain
(Received 5 April 2015; accepted 7 August 2015; published online 24 August 2015) We have developed a complete instrument to perform direct, dry, and cost-effective lithography on conductive materials, based on localized electrical discharges, which avoids using masks or chemicals typical of conventional photolithography. The technique is considered fully compatible with substrate transport based systems, like roll-to-roll technology. The prototype is based on two piezo nano-steppers coupled to three linear micro-stages to cover a large scale operation from micrometers to centimeters. The operation mode consists of a spring probe biased at low DC voltage with respect to a grounded conductive layer. The tip slides on the target layer keeping contact with the material in room conditions, allowing continuous electric monitoring of the process, and also real-time tilt correction via software. The sliding tip leaves an insulating path (limited by the tip diameter) along the material, enabling to draw electrically insulated tracks and pads. The physical principle of operation is based in the natural self-limitation of the discharge due to material removal or insulation. The so produced electrical discharges are very fast, in the range of µs, so features may be performed at speeds of few cm/s, enabling scalability to large areas. The instrument has been tested on different conducting materials as gold, indium tin oxide, and aluminum, allowing the fabrication of alphanumeric displays based on passive matrix of organic light emitting diodes without the use of masks or photoresists. We have verified that the highest potential is achieved on graphene, where no waste material is detected, producing excellent well defined edges. This allows manufacturing graphene micro-ribbons with a high aspect ratio up to 1200:1. C 2015 AIP Publishing LLC. [http://dx.doi.org/10.1063/1.4928748]
In recent years, organic semiconductors and other emerging materials as graphene allow addressing novel applications beyond the scope of conventional electronics. In particular, manufacturing over large areas on flexible substrates and a high yield-to-cost ratio summarize the most relevant chances, especially for those materials which allow solutionprocessing. Upscaling and faster processing, as well as increasing manufacturing yields, are the current challenges for industrial applications. In this context, manufacturing technologies based in the concept of substrate transport, like roll-to-roll (R2R) technique,1 are considered the best option to accomplish these goals, so patterning techniques compatible with R2R deserve special attention, especially those considered singlestep procedures. In the so-called flexible electronics, the scale from the small features to the overall patterned areas can vary enormously, from submicrometer sizes—in some electronic applications such as sensors, transducers, active matrix cells, or biological chips— to areas of square centimeters or meters for end user products (displays, touch screens, photovoltaic panels, or electrodes for batteries and super-capacitors).2 Consequently, those patterning techniques capable of covering a large range of scales in a single run are highly desirable. In this work, we report the development of a dry, subtractive, and large area lithography system, based on localized electrical discharges for conductive thin films in a large range, from micro/nano patterning to centimeters. Since the electrical phenomenon is verified between two conductors, this technique is particularly suitable to pattern metal-, semiconductor0034-6748/2015/86(8)/084704/6/$30.00
or graphene-based electrodes in a single step. Furthermore, the process does not affect the insulating layers below (such as in the case of graphene on SiO2) which is an advantage over other subtractive techniques like laser ablation. The chance of an in situ monitoring of the work progress via electrical signal recording, the easiness to overcome the problem of substrate tilt, and the high quality of the performed features summarize the main points motivating this proposal. The lithography process is performed using a conventional tip-to-plane electrode configuration according to the scheme shown in Fig. 1(A), where the plane represents the conductive layer to be patterned. This arrangement allows affecting at once small material regions of the order of the tip. The discharges are transient phenomena involving a wide range of currents depending on the operating conditions and electrical properties of target materials, and are continuously monitored by a high sampling rate digital oscilloscope. We will adopt the general term spark when speaking about the brief short-circuit of the tip-to-sample capacitor, detected by the oscilloscope as a short voltage trace in a series resistor during the probe approaching to the target layer. These sparks are very fast processes (from tens ns to a few µs), so features can be patterned at speeds of many cm/s, enabling scalability to large areas. The system is similar to electrical discharge machining (EDM), a technique well known in the metallurgy industry to form metal parts. However, although sharing a similar basic principle, conventional EDM is performed in conditions very
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FIG. 1. (A) Schematic of the homemade electrical discharge patterning system. (B) Electrical-discharge lithography prototype: (a) PI PLS-85 linear stages, (b) homemade main frame, (c) PI Hera XY piezo stage, (d) PI Lisa linear actuator, (e) collet–nut kit spring-probe attachment mechanism, and (f) four tip attach/contact mechanism.
far from those used in our prototype.3 EDM employs high voltage pulses, typically from hundreds to kV with duration of µs, and uses to work in non-contact mode with mediation of a dielectric fluid between tip and sample in order to remove residues. In contrast, our technique is allowed to operate at DC low voltage in room conditions. Our system works in contact mode and the voltage is set close to the lower threshold limit to affect the material. This contributes to reduce both waste generation and progress of the eroded region very far beyond the tip area. The voltage can be applied in continuous mode since the physical process is self-limited in a way explained below. We have used home-made cantilevers with very narrow metal needles (a few micron at the tip end) and commercial spring-probes (made of steel coated by a thick Ni layer with a thin intermediate Cu film) in order to damp the contact between tip and sample. The spring constant is 300 N/m ± 20%, which, as far as we have observed, prevents mechanical erosion of layers for spring compressions below 1 µm, a distance accurately controlled by our system. The used probes are truncated cone-shaped with apex angle between 45◦ and 60◦ and average tip radius at the blunt end from 10 to 20 µm. One of the benefits of the spring probes is the integrated shock absorber mechanism. It substitutes the force feedback system typical of scanning probe instruments, allowing an increase in operating speeds and a considerable reduction of processing time, up to the required level for working at industrial R2R scales. The probe is negatively biased with a DC voltage (0–50 V) respect to ground, which is located on the material surface by an array of silver paint contacts to homogenize potential. The probe is driven by means of a homemade XYZ setup, controlled by computer using specific software. Current across the tip-sample gap is monitored with an oscilloscope in terms of voltage changes Vt = VCh2 − VCh1, in a series resistor, Rt (Fig. 1(A)). It should be noted that this real-time monitoring allows knowing instantly if the electrical erosion is being performed rightly for the decision-making, giving chance to stop and redirect the process immediately, in an automatized way. Moreover, the in situ electrical signal monitoring is a great help in terms of alignment and scalability: contact points on the sample can be accurately and rapidly determined through an
Rev. Sci. Instrum. 86, 084704 (2015)
initial workspace mapping prior to the patterning. This information is introduced via software, and the stepper controller includes positional adjustments on the final patterning algorithm, working in background. Thanks to this preliminary stage, we can coexist with tilt issues, typical of large area substrates, ensuring good quality results in a short period of time. We can also use specific marks at the edge of the sample, which will be detected after replacing the sample and support the re-alignment process. These aspects are a difference from other subtractive techniques, as, e.g., laser ablation, where this in situ feedback is usually difficult to implement.4 On the other hand, our technique cannot be performed over insulating materials, so it is mainly indicated for electrode patterning. During the initial vertical approach, material removal due to the spark current usually creates a dot or crater below the probe. Once material has been removed or become insulator, the discharge is interrupted. Due to this effect, the progress of the erosion is self-limited in a natural way. This leads the tip to settle on an insulating region of the surface, preserving a capacitive effect between tip and sample. Thus, the process may be triggered again if the tip moves horizontally approaching the boundary of the pristine material to produce a new electrical discharge, and so on. Eventually, it leaves an insulating path beneath the tip as it slides on the material surface. The obtained resolution is determined by the motor step and tip diameter and can be close to the micron. With the correct movement algorithm, the probe can draw patterns on samples at a great speed (many cm/s), aided by the small spark duration. This technique is fast and dry, useful to work on any substrate (curved, flexible, etc) as long as the target layer shows a significant conductivity, and could be considered compatible with R2R technology. The electrical-erosion machine, shown in Fig. 1(B), is positioned on an optical table supported by four pneumatic levelling mounts, capable of damping vibrations theoretically above 10 Hz. Despite this, some of the components used (commercial spring probes or home-made cantilevers) may introduce irregular vibrations during operation, as commented below. The setup has two main systems that guarantee a large processing scale. First, three linear electromechanical stages are used (Physik Instrumente (PI) PLS-85) for the horizontal XY plane and for the vertical Z-axis movement (Fig. 1(B), (a)), hitched to a home-made main frame (Fig. 1(B), (b)). These stages assure a micro processing in travel ranges up to 100 mm, with 0.05 µm step accuracy and 1 µm general repeatability, at high operative velocity (15 mm/s). A second system is fixed on those PI PLS-85 linear stages by homemade designed parts, extending the processing scale down to nanometer accuracy. XY-axes and Z-axis movements are achieved by the operation of a PI Hera XY piezo stage (Fig. 1(B), (c)) and a PI Lisa linear piezo-actuator (Fig. 1(B), (d)), respectively. The maximum trip for XY-axes reaches 100 µm with 0.4 nm resolution and ±2 nm repeatability. For the Zaxis, a 38 µm full displacement with 0.1 nm resolution and ±3 nm repeatability is available. These technical values are valid for a closed-loop operation, the adequate working mode in this case. The sample for processing is clamped (Fig. 1(B), (e)) to the PI Hera XY piezo-stage, and conductive paint is deposited in droplets. For a proper procedure, an optimum and
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easy probe attachment was designed (Fig. 1(B), (f)). The tip holder is electrically insulated in order not to interfere with the Z-axis piezo stage. This accessory allows using different probe types for different purpose patterning resolutions and tasks. The suitable voltage to produce electrical erosion depends on the material conductivity, layer thickness, and bottom substrate (in our case, it is glass and polyethylene terephthalate, PET). Typical Al layers, with thicknesses between 200 and 300 nm are easily eroded at voltages as low as 2-3 V. Indium tin oxide (ITO) layers of 100 nm are eroded from 11 V. Gold layers of 100 nm on glass are patterned from 8 V, whereas 3 V may work fine for thinner layers of 15 nm. These voltages may be considered a threshold. Below these, the failure rate during operation increases dramatically. Table I summarizes the threshold voltage (for negative polarity) found for layers of several target materials and substrates when working with a tip diameter of 40 µm in ambient conditions (20 ◦C and 30% of Relative Humidity (RH)). Although the impedance measured between GND and the contact point varies according to its location on the surface, the threshold voltage for triggering the spark is not very dependent on the location of the tip and hence on this impedance. This is because the breakdown of the tip-to-sample capacitor (spark generation) is governed by the static electric fields between the tip and sample, and not by the impedance, which is a dynamic concept to describe the subsequent current flux along the circuit. The fact that layers with higher sheet resistance require higher operating voltages is because these layers use to have a lower free carrier density, and therefore, the ability of shielding the electric fields to outside the material is low. In consequence, the fields penetrate deeper into the material, and the potential gradients are lower and so are the electric fields at the breakdown point (for example, tip apex). In this technique, the role of the impedance between tip and GND contact is to limit the breakdown current during the erosion progress. After the spark triggering, a lower current will extend the time for crater completion up to several µs. After the spark quenching, this impedance still influences the recharge rate of the residual capacitor formed by the tip-craterlayer geometry. In any case, the tip-sample capacitor is small (tens pF), and therefore, the discharge or recharge of the tip capacitor is fast, in the order of a few µs at most, which still leaves plenty of room for the operating speed (up to many cm/s).
Subtractive patterning techniques inevitably leave some waste and so is the case with this technique. Operation on conventional metals like gold or aluminum, typically deposited by evaporation or sputtering, produces complete material removal, as well as waste generation in two forms: material nanoparticles spread over a region of several microns around the pattern (bright dotted regions between grooves in Fig. 2(a)) and material accumulation at the edge of the patterns (bright edges on the left groove in Fig. 2(a)). Nanoparticles may be removed by conventional methods like simultaneous vacuum cleaning or eventually by a soft, wet chemical etching. On the other hand, the accumulation of particles at the edge of patterns creates protruding flanges of a few hundred nm, as shown in the profilometry measurements of the grooves (Fig. 2(b)). These features become troublesome for the final device especially if they appear on the bottom electrodes, affecting the subsequent layers. To solve this issue, a specific procedure to smooth edges has been designed, using the tip just as a sweeping tool over the edges without any applied voltage. This method achieves reduction of protruding edges to a reasonable level in the region of interest, although the overall process is slowed down. When operating on ceramic-like materials such as conductive oxides (ITO), we observe that discharges do not
TABLE I. Threshold voltage for layers of several target materials and substrates (including graphene single layer (SL)), using a 40 µm tip diameter in ambient conditions (20 ◦C and 30% RH). Material/substrate ITO (100 nm)/glass ITO (100 nm)/PET Au (100 nm)/Cr (5 nm)/glass Au (45 nm)/Cr (5 nm)/glass Au (10 nm)/Cr (5 nm)/glass Au (100 nm)/PET Al (100 nm)/glass Al (100 nm)/PET Graphene (SL)/SiO2/Si:p+
Threshold voltage (−V) 11 8 8 4-5 3 4 2 1-2 20
FIG. 2. Sweeping method to planarize edges, applied to patterned grooves in a 50 nm gold layer: (a) optical image of two grooves before (left) and after (right) sweeping the edges with the probe. (b) Profilometry scans of both stripes.
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FIG. 3. Picture of two stripes patterned on ITO (100 nm)/glass, at +12 V, before (up) and after (down) etching. On the left side, the respective measured profiles.
produce complete material removal, and consequently, the nanoparticle spreading beyond the patterns is much lower. Material not removed appears to be broken or degraded, so electrical insulation—which is the pursued goal—is achieved anyway. Smoothing procedures like the previously mentioned can be applied successfully, as well as a soft, wet etching without jeopardizing final performance. In the case of ITO, a 6M solution of hydrochloric acid 37%, during 10 s at 20 ◦C is sufficient to remove most of the waste, whereas pristine material is etched at a slow rate of about 1 Å/s. Since this is the substrate layer, it does not mean too inconvenience. Figure 3 shows a picture of two stripes (right side) patterned on a 100 nm ITO layer on glass, at positive polarization +12 V, before and after etching in the mentioned conditions. On the left side, the measured profiles are shown, revealing the level of cleanliness achieved by this method. When working with conventional metals (gold and aluminum), sticking of eroded material on the tip is observed under certain operating conditions. This effect is noticeable for operating voltages above, but very close to the threshold for electrical erosion. It is attributed to the fact that sparks are not strong enough to volatilize material but just to its partial melting, favoring the adhesion to the tip. This eventually results in an increase of the effective tip diameter during runs, causing a widening of the patterned line-width and a decrease of resolution. This is avoided by adjusting the operating voltage to slightly higher values, hence obtaining more effective sparks. Probe wear is a relevant feature to consider as may directly affect the accuracy and geometry of patterns as well as leaving annoying waste. It determines the probe lifetime and therefore how often the probe must be replaced. Wear may be partially due to mechanical friction depending on controllable parameters like exerted pressure (determined by the spring compression) and probe speed, so it can be minimized. Actually, wear due to friction when tip slides over evaporated or sputtered layers at 0 V is negligible compared to that when operating at high voltages above threshold. Voltage is therefore
the most critical factor. We have conducted tests of probe wear on the hardest electrode at our disposal, ITO grown on glass. We note that commercial probes used in our prototype are typically intended for electrical measurements and not for this operation, so wear may be more pronounced than would be expected with more suitable materials. Under negative polarity (−12 V), probes performed runs 1000 mm long, resulting in a material removal rate (MRR) of 2-3.5 × 10−2 mm3 per m run, for tip diameters between 35 and 55 µm, respectively. MRR increases up to 9.6 × 10−2 mm3/m operating at −20 V (for a 55 µm tip). On ITO layers, the tip wear may increase up to a 20% using positive polarization. This is preliminary attributed to the impact of plasma ions on the tip metal during discharges. In any case, this issue shortens the probe length and may significantly affect the radius of a conical tip and hence the accuracy of patterns. These problems may be remedied with a suitable tip design (cylindrical shape) and with the integration of a damping system, like the rudimentary spring probe used, in order to correct the force of the tip over the surface. MMR can be reduced by using harder and more suitable materials. In Fig. 5(a), an array of grooves 15 µm width (dark stripes) were patterned on a 15 nm thick gold layer at −5 V. Inset shows a zoom corresponding to the dashed white rectangle to verify grooves quality. In this case, the irregular waviness with long period along the edges of the stripes is attributed to an artifact of the specific home-made cantilever. The cantilever was rudimentary built from a sharp metal probe (about 10 µm diameter) due to its very low cost. When the arm shape is not optimized, it may result in lateral vibrations during operation, causing this waviness. However, even in case of cancelling the mechanical swing of the probe, an intrinsic waviness along the edge of the patterned lines may be observed when working at high voltages, well above the operating threshold. In this case, the erosion progress is dominated by circle-like craters due to strong sparks. Figure 4 shows these features on ITO/glass layers. The upper groove was eroded at −20 V, showing an intrinsic ripple along the line edge due to the successive crater fronts. This undesirable effect degrades the pattern quality.
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FIG. 4. Grooves performed on ITO/glass in identical conditions but with different operating voltages, −20 V (upper) and −12 V (lower).
The lower groove was performed at −12 V, where this effect is much less pronounced and results in smoother edges. This suggests to work with not too high voltages above threshold. To test the electrical discharge lithography system on device performance, we have manufactured, by solution processing, 3 × 3 and 6 × 6 alphanumeric displays based on organic light emitting diode (OLED) passive matrix, using commercial poly[2-methoxy-5-(3′, 7′-dimethyloctyloxy)-1,4phenylenevinylene] (MDMO-PPV) as active layer. The OLED layer structure consists of ITO (100 nm)/PEDOT: PSS (50 nm)/ MDMO-PPV (70 nm)/Ca/Al, where PEDOT:PSS refers to the conductive polymer poly(3,4-ethylenedioxythiophene) polystyrene sulfonate. We highlight that both ITO anode and Al cathode were electrically patterned without using masks and chemicals. The re-alignment required for a proper cathode patterning was carried out by previous electrical detection of specific marks at the edge of the sample. The electrical eroded pattern performed on the ITO anode for the 6 × 6 pixel matrix is shown in Fig. 5(b). In Fig. 5(c), we can observe the operation of a central pixel (3 × 3 mm) in a 3 × 3 OLED
FIG. 6. (a) Optical micrograph of a straight groove patterned at 30 V on single-layer graphene. (b) AFM topographic image of the area enclosed by the dashed rectangle in (a). (c) AFM phase image of a magnified area including the edge.
display, resulting in 24 cd/m2 and 0.4 cd/A. The electrical and optical performances in terms of current-voltage characteristic (I-V) and electroluminescence (EL) spectra are shown in Fig. 5(d). Note that this technique allows selective removal of layers as long as the top layer is patterned at a voltage significantly below the bottom one: in this case, aluminum cathode was patterned at 3 V, an insufficient voltage to affect directly the ITO anode tracks (11 V, as mentioned above). Tests on commercial graphene single-layers on SiO2/Si: p+ substrates have also been performed. The sheet resistance of this graphene is close to 1 kΩ/sq, so conduction properties are
FIG. 5. (a) 15 µm stripes (dark bands) patterned on a 15 nm gold layer at −5 V performed with home-made cantilevers. (b) Isolated tracks in the ITO anode for a 6 × 6 pixel passive matrix. (c) MDMO-PPV based 3 × 3 OLED display working at 24 cd/m2 and 0.4 cd/A. (d) EL emission at different driving currents. Inset shows one pixel I-V curve.
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FIG. 7. Graphene micro-ribbons (1 µm × 1200 µm, separated by 11 µm) performed by electrical discharge lithography. (a) Magnified optical image of a micro-ribbon. (b) I2D Raman map corresponding to the rectangular marked area, 5 × 95 µm2. (c) Raman spectra recorded inside and outside the graphene ribbon.
far to be ideal. In consequence, the operating voltage needed for an optimal patterning is high compared to those used on ITO and conventional metals. A threshold voltage for electrical erosion was detected at about 20 V, but the best feature quality, in terms of edge sharpness and material removal, was obtained at 30 V. Patterning of graphene layers in room conditions is revealed as particularly successful due to the high rate of material removal and absence of residues, what leads to clearly defined edges. As an explanation, it has been proposed that the electron discharge is able to promote the chemical reaction of C atoms with surface adsorbed water. Thus, C is likely removed during the discharge by forming CO and CH4 gaseous species, avoiding residue accumulation.5,6 Microphotographs from a patterned line at 30 V (Fig. 6(a)), together with atomic force microscopy (AFM) topographic images (Figs. 6(b) and 6(c)) recorded at increasing magnifications, reveal high edge quality, as well as a good removal efficiency within a groove, as confirmed by Raman spectroscopy. Sharp edges of the pattern are remarkable. The poor contrast in the topographic AFM image of Fig. 6(b) is a result of the low step (about 1 nm) between the exposed SiO2 layer and graphene. In these conditions, as a matter of proof, a set of graphene micro-ribbons, 1 µm wide and up to 1.2 mm long, separated by bands of removed material 11 µm wide, has been patterned. The diameter of the tip was accurately measured resulting 11 µm, so the stepper displacement was arranged to obtain such high aspect ratio of about 1200:1. Final results can be observed in Fig. 7. A zoom corresponding to the marked rectangle (5 × 95 µm2) shows a micro-ribbon 1-2 µm wide (Fig. 7(a)). It is well known that Raman spectroscopy is a suitable technique for graphene characterization;7 in particular, the intensity of the I2D mode is the most sensitive feature to characterize the graphene quality. Fig. 7(c) shows an example of Raman spectra recorded in points from the inner and outer regions of the micro-ribbon (asterisk in Fig. 7(b), respectively). The spectrum inside the ribbon corresponds to that of pristine
single-layer CVD graphene on SiO2/Si, confirming the quality of the graphene, as well as its absence beyond the ribbon. In Fig. 7(b), the intensity of the I2D mode has been mapped along a two dimensional region including the ribbon, confirming a uniform quality, and a high contrast between the ribbon and its surroundings (in this case, Raman resolution is estimated to be around 0.7 µm). In conclusion, we have built a prototype for a subtractive lithography based on micro-electrical discharges, which allows single-step patterning in a wide range of scales, from microns to centimeters. Advantages and drawbacks over other subtractive techniques covering a similar range of scales, like laser ablation, have been discussed. With this system, we demonstrate the development of an OLED passive matrix where anode and cathode were patterned without using masks and chemicals. It shows especially good performance over graphene because of an almost complete absence of residues. Its versatility and precision has allowed obtaining an array of graphene micro-ribbons with an excellent aspect ratio, which is very promising for terahertz plasmonic applications.8 Funding by the Spanish Ministerio de Economía y Competitividad (MINECO) under Project No. MAT2012-37276C03 and Comunidad de Madrid Excellence Network under Project No. S2013/MIT-2740 is acknowledged. Alicia de Andrés and Esteban Climent, from Material Science Institute of Madrid (CSIC), are gratefully acknowledged for Raman characterization. 1J.
Willmann, D. Stocker, and E. Dörsam, Org. Electron. 15, 1631 (2014). Klauk, Organic Electronics II: More Materials and Applications (Wiley, 2012). 3K. H. Ho and S. T. Newman, Int. J. Mach. Tools Manuf. 43, 1287 (2003). 4Y. Zhou, Q. Bao, B. Varghese, L. A. L. Tang, C. K. Tan, C.-H. Sow, and K. P. Loh, Adv. Mater. 22, 67 (2010). 5R. McCarley, S. Hendricks, and A. Bard, J. Phys. Chem. 96, 10089 (1992). 6J. Gardener and J. Golovchenko, Nanotechnology 23, 185302 (2013). 7C. Ferrari and D. Basko, Nat. Nanotechnol. 8, 235 (2013). 8L. Ju, B. Geng, J. Horng, C. Girit, M. Martin, Z. Hao, H. A. Bechtel, X. Liang, A. Zettl, Y. R. Shen, and F. Wang, Nat. Nanotechnol. 6, 630 (2011).
2H.
Citation: Review of Scientific Instruments 86, 084704 (2015); doi: 10.1063/1.4928748 View online: http://dx.doi.org/10.1063/1.4928748 View Table of Contents: http://aip.scitation.org/toc/rsi/86/8 Published by the American Institute of Physics
REVIEW OF SCIENTIFIC INSTRUMENTS 86, 084704 (2015)
Development of electrical-erosion instrument for direct write micro-patterning on large area conductive thin films Ángel Luis Álvarez, Carmen Coya, and Miguel García-Vélez Departamento Teoría de la Señal y Comunicaciones, Sistemas Telemáticos y Computación, Escuela Técnica Superior de Ingeniería de Telecomunicación, Universidad Rey Juan Carlos, Fuenlabrada, Madrid 28943, Spain
(Received 5 April 2015; accepted 7 August 2015; published online 24 August 2015) We have developed a complete instrument to perform direct, dry, and cost-effective lithography on conductive materials, based on localized electrical discharges, which avoids using masks or chemicals typical of conventional photolithography. The technique is considered fully compatible with substrate transport based systems, like roll-to-roll technology. The prototype is based on two piezo nano-steppers coupled to three linear micro-stages to cover a large scale operation from micrometers to centimeters. The operation mode consists of a spring probe biased at low DC voltage with respect to a grounded conductive layer. The tip slides on the target layer keeping contact with the material in room conditions, allowing continuous electric monitoring of the process, and also real-time tilt correction via software. The sliding tip leaves an insulating path (limited by the tip diameter) along the material, enabling to draw electrically insulated tracks and pads. The physical principle of operation is based in the natural self-limitation of the discharge due to material removal or insulation. The so produced electrical discharges are very fast, in the range of µs, so features may be performed at speeds of few cm/s, enabling scalability to large areas. The instrument has been tested on different conducting materials as gold, indium tin oxide, and aluminum, allowing the fabrication of alphanumeric displays based on passive matrix of organic light emitting diodes without the use of masks or photoresists. We have verified that the highest potential is achieved on graphene, where no waste material is detected, producing excellent well defined edges. This allows manufacturing graphene micro-ribbons with a high aspect ratio up to 1200:1. C 2015 AIP Publishing LLC. [http://dx.doi.org/10.1063/1.4928748]
In recent years, organic semiconductors and other emerging materials as graphene allow addressing novel applications beyond the scope of conventional electronics. In particular, manufacturing over large areas on flexible substrates and a high yield-to-cost ratio summarize the most relevant chances, especially for those materials which allow solutionprocessing. Upscaling and faster processing, as well as increasing manufacturing yields, are the current challenges for industrial applications. In this context, manufacturing technologies based in the concept of substrate transport, like roll-to-roll (R2R) technique,1 are considered the best option to accomplish these goals, so patterning techniques compatible with R2R deserve special attention, especially those considered singlestep procedures. In the so-called flexible electronics, the scale from the small features to the overall patterned areas can vary enormously, from submicrometer sizes—in some electronic applications such as sensors, transducers, active matrix cells, or biological chips— to areas of square centimeters or meters for end user products (displays, touch screens, photovoltaic panels, or electrodes for batteries and super-capacitors).2 Consequently, those patterning techniques capable of covering a large range of scales in a single run are highly desirable. In this work, we report the development of a dry, subtractive, and large area lithography system, based on localized electrical discharges for conductive thin films in a large range, from micro/nano patterning to centimeters. Since the electrical phenomenon is verified between two conductors, this technique is particularly suitable to pattern metal-, semiconductor0034-6748/2015/86(8)/084704/6/$30.00
or graphene-based electrodes in a single step. Furthermore, the process does not affect the insulating layers below (such as in the case of graphene on SiO2) which is an advantage over other subtractive techniques like laser ablation. The chance of an in situ monitoring of the work progress via electrical signal recording, the easiness to overcome the problem of substrate tilt, and the high quality of the performed features summarize the main points motivating this proposal. The lithography process is performed using a conventional tip-to-plane electrode configuration according to the scheme shown in Fig. 1(A), where the plane represents the conductive layer to be patterned. This arrangement allows affecting at once small material regions of the order of the tip. The discharges are transient phenomena involving a wide range of currents depending on the operating conditions and electrical properties of target materials, and are continuously monitored by a high sampling rate digital oscilloscope. We will adopt the general term spark when speaking about the brief short-circuit of the tip-to-sample capacitor, detected by the oscilloscope as a short voltage trace in a series resistor during the probe approaching to the target layer. These sparks are very fast processes (from tens ns to a few µs), so features can be patterned at speeds of many cm/s, enabling scalability to large areas. The system is similar to electrical discharge machining (EDM), a technique well known in the metallurgy industry to form metal parts. However, although sharing a similar basic principle, conventional EDM is performed in conditions very
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FIG. 1. (A) Schematic of the homemade electrical discharge patterning system. (B) Electrical-discharge lithography prototype: (a) PI PLS-85 linear stages, (b) homemade main frame, (c) PI Hera XY piezo stage, (d) PI Lisa linear actuator, (e) collet–nut kit spring-probe attachment mechanism, and (f) four tip attach/contact mechanism.
far from those used in our prototype.3 EDM employs high voltage pulses, typically from hundreds to kV with duration of µs, and uses to work in non-contact mode with mediation of a dielectric fluid between tip and sample in order to remove residues. In contrast, our technique is allowed to operate at DC low voltage in room conditions. Our system works in contact mode and the voltage is set close to the lower threshold limit to affect the material. This contributes to reduce both waste generation and progress of the eroded region very far beyond the tip area. The voltage can be applied in continuous mode since the physical process is self-limited in a way explained below. We have used home-made cantilevers with very narrow metal needles (a few micron at the tip end) and commercial spring-probes (made of steel coated by a thick Ni layer with a thin intermediate Cu film) in order to damp the contact between tip and sample. The spring constant is 300 N/m ± 20%, which, as far as we have observed, prevents mechanical erosion of layers for spring compressions below 1 µm, a distance accurately controlled by our system. The used probes are truncated cone-shaped with apex angle between 45◦ and 60◦ and average tip radius at the blunt end from 10 to 20 µm. One of the benefits of the spring probes is the integrated shock absorber mechanism. It substitutes the force feedback system typical of scanning probe instruments, allowing an increase in operating speeds and a considerable reduction of processing time, up to the required level for working at industrial R2R scales. The probe is negatively biased with a DC voltage (0–50 V) respect to ground, which is located on the material surface by an array of silver paint contacts to homogenize potential. The probe is driven by means of a homemade XYZ setup, controlled by computer using specific software. Current across the tip-sample gap is monitored with an oscilloscope in terms of voltage changes Vt = VCh2 − VCh1, in a series resistor, Rt (Fig. 1(A)). It should be noted that this real-time monitoring allows knowing instantly if the electrical erosion is being performed rightly for the decision-making, giving chance to stop and redirect the process immediately, in an automatized way. Moreover, the in situ electrical signal monitoring is a great help in terms of alignment and scalability: contact points on the sample can be accurately and rapidly determined through an
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initial workspace mapping prior to the patterning. This information is introduced via software, and the stepper controller includes positional adjustments on the final patterning algorithm, working in background. Thanks to this preliminary stage, we can coexist with tilt issues, typical of large area substrates, ensuring good quality results in a short period of time. We can also use specific marks at the edge of the sample, which will be detected after replacing the sample and support the re-alignment process. These aspects are a difference from other subtractive techniques, as, e.g., laser ablation, where this in situ feedback is usually difficult to implement.4 On the other hand, our technique cannot be performed over insulating materials, so it is mainly indicated for electrode patterning. During the initial vertical approach, material removal due to the spark current usually creates a dot or crater below the probe. Once material has been removed or become insulator, the discharge is interrupted. Due to this effect, the progress of the erosion is self-limited in a natural way. This leads the tip to settle on an insulating region of the surface, preserving a capacitive effect between tip and sample. Thus, the process may be triggered again if the tip moves horizontally approaching the boundary of the pristine material to produce a new electrical discharge, and so on. Eventually, it leaves an insulating path beneath the tip as it slides on the material surface. The obtained resolution is determined by the motor step and tip diameter and can be close to the micron. With the correct movement algorithm, the probe can draw patterns on samples at a great speed (many cm/s), aided by the small spark duration. This technique is fast and dry, useful to work on any substrate (curved, flexible, etc) as long as the target layer shows a significant conductivity, and could be considered compatible with R2R technology. The electrical-erosion machine, shown in Fig. 1(B), is positioned on an optical table supported by four pneumatic levelling mounts, capable of damping vibrations theoretically above 10 Hz. Despite this, some of the components used (commercial spring probes or home-made cantilevers) may introduce irregular vibrations during operation, as commented below. The setup has two main systems that guarantee a large processing scale. First, three linear electromechanical stages are used (Physik Instrumente (PI) PLS-85) for the horizontal XY plane and for the vertical Z-axis movement (Fig. 1(B), (a)), hitched to a home-made main frame (Fig. 1(B), (b)). These stages assure a micro processing in travel ranges up to 100 mm, with 0.05 µm step accuracy and 1 µm general repeatability, at high operative velocity (15 mm/s). A second system is fixed on those PI PLS-85 linear stages by homemade designed parts, extending the processing scale down to nanometer accuracy. XY-axes and Z-axis movements are achieved by the operation of a PI Hera XY piezo stage (Fig. 1(B), (c)) and a PI Lisa linear piezo-actuator (Fig. 1(B), (d)), respectively. The maximum trip for XY-axes reaches 100 µm with 0.4 nm resolution and ±2 nm repeatability. For the Zaxis, a 38 µm full displacement with 0.1 nm resolution and ±3 nm repeatability is available. These technical values are valid for a closed-loop operation, the adequate working mode in this case. The sample for processing is clamped (Fig. 1(B), (e)) to the PI Hera XY piezo-stage, and conductive paint is deposited in droplets. For a proper procedure, an optimum and
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easy probe attachment was designed (Fig. 1(B), (f)). The tip holder is electrically insulated in order not to interfere with the Z-axis piezo stage. This accessory allows using different probe types for different purpose patterning resolutions and tasks. The suitable voltage to produce electrical erosion depends on the material conductivity, layer thickness, and bottom substrate (in our case, it is glass and polyethylene terephthalate, PET). Typical Al layers, with thicknesses between 200 and 300 nm are easily eroded at voltages as low as 2-3 V. Indium tin oxide (ITO) layers of 100 nm are eroded from 11 V. Gold layers of 100 nm on glass are patterned from 8 V, whereas 3 V may work fine for thinner layers of 15 nm. These voltages may be considered a threshold. Below these, the failure rate during operation increases dramatically. Table I summarizes the threshold voltage (for negative polarity) found for layers of several target materials and substrates when working with a tip diameter of 40 µm in ambient conditions (20 ◦C and 30% of Relative Humidity (RH)). Although the impedance measured between GND and the contact point varies according to its location on the surface, the threshold voltage for triggering the spark is not very dependent on the location of the tip and hence on this impedance. This is because the breakdown of the tip-to-sample capacitor (spark generation) is governed by the static electric fields between the tip and sample, and not by the impedance, which is a dynamic concept to describe the subsequent current flux along the circuit. The fact that layers with higher sheet resistance require higher operating voltages is because these layers use to have a lower free carrier density, and therefore, the ability of shielding the electric fields to outside the material is low. In consequence, the fields penetrate deeper into the material, and the potential gradients are lower and so are the electric fields at the breakdown point (for example, tip apex). In this technique, the role of the impedance between tip and GND contact is to limit the breakdown current during the erosion progress. After the spark triggering, a lower current will extend the time for crater completion up to several µs. After the spark quenching, this impedance still influences the recharge rate of the residual capacitor formed by the tip-craterlayer geometry. In any case, the tip-sample capacitor is small (tens pF), and therefore, the discharge or recharge of the tip capacitor is fast, in the order of a few µs at most, which still leaves plenty of room for the operating speed (up to many cm/s).
Subtractive patterning techniques inevitably leave some waste and so is the case with this technique. Operation on conventional metals like gold or aluminum, typically deposited by evaporation or sputtering, produces complete material removal, as well as waste generation in two forms: material nanoparticles spread over a region of several microns around the pattern (bright dotted regions between grooves in Fig. 2(a)) and material accumulation at the edge of the patterns (bright edges on the left groove in Fig. 2(a)). Nanoparticles may be removed by conventional methods like simultaneous vacuum cleaning or eventually by a soft, wet chemical etching. On the other hand, the accumulation of particles at the edge of patterns creates protruding flanges of a few hundred nm, as shown in the profilometry measurements of the grooves (Fig. 2(b)). These features become troublesome for the final device especially if they appear on the bottom electrodes, affecting the subsequent layers. To solve this issue, a specific procedure to smooth edges has been designed, using the tip just as a sweeping tool over the edges without any applied voltage. This method achieves reduction of protruding edges to a reasonable level in the region of interest, although the overall process is slowed down. When operating on ceramic-like materials such as conductive oxides (ITO), we observe that discharges do not
TABLE I. Threshold voltage for layers of several target materials and substrates (including graphene single layer (SL)), using a 40 µm tip diameter in ambient conditions (20 ◦C and 30% RH). Material/substrate ITO (100 nm)/glass ITO (100 nm)/PET Au (100 nm)/Cr (5 nm)/glass Au (45 nm)/Cr (5 nm)/glass Au (10 nm)/Cr (5 nm)/glass Au (100 nm)/PET Al (100 nm)/glass Al (100 nm)/PET Graphene (SL)/SiO2/Si:p+
Threshold voltage (−V) 11 8 8 4-5 3 4 2 1-2 20
FIG. 2. Sweeping method to planarize edges, applied to patterned grooves in a 50 nm gold layer: (a) optical image of two grooves before (left) and after (right) sweeping the edges with the probe. (b) Profilometry scans of both stripes.
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FIG. 3. Picture of two stripes patterned on ITO (100 nm)/glass, at +12 V, before (up) and after (down) etching. On the left side, the respective measured profiles.
produce complete material removal, and consequently, the nanoparticle spreading beyond the patterns is much lower. Material not removed appears to be broken or degraded, so electrical insulation—which is the pursued goal—is achieved anyway. Smoothing procedures like the previously mentioned can be applied successfully, as well as a soft, wet etching without jeopardizing final performance. In the case of ITO, a 6M solution of hydrochloric acid 37%, during 10 s at 20 ◦C is sufficient to remove most of the waste, whereas pristine material is etched at a slow rate of about 1 Å/s. Since this is the substrate layer, it does not mean too inconvenience. Figure 3 shows a picture of two stripes (right side) patterned on a 100 nm ITO layer on glass, at positive polarization +12 V, before and after etching in the mentioned conditions. On the left side, the measured profiles are shown, revealing the level of cleanliness achieved by this method. When working with conventional metals (gold and aluminum), sticking of eroded material on the tip is observed under certain operating conditions. This effect is noticeable for operating voltages above, but very close to the threshold for electrical erosion. It is attributed to the fact that sparks are not strong enough to volatilize material but just to its partial melting, favoring the adhesion to the tip. This eventually results in an increase of the effective tip diameter during runs, causing a widening of the patterned line-width and a decrease of resolution. This is avoided by adjusting the operating voltage to slightly higher values, hence obtaining more effective sparks. Probe wear is a relevant feature to consider as may directly affect the accuracy and geometry of patterns as well as leaving annoying waste. It determines the probe lifetime and therefore how often the probe must be replaced. Wear may be partially due to mechanical friction depending on controllable parameters like exerted pressure (determined by the spring compression) and probe speed, so it can be minimized. Actually, wear due to friction when tip slides over evaporated or sputtered layers at 0 V is negligible compared to that when operating at high voltages above threshold. Voltage is therefore
the most critical factor. We have conducted tests of probe wear on the hardest electrode at our disposal, ITO grown on glass. We note that commercial probes used in our prototype are typically intended for electrical measurements and not for this operation, so wear may be more pronounced than would be expected with more suitable materials. Under negative polarity (−12 V), probes performed runs 1000 mm long, resulting in a material removal rate (MRR) of 2-3.5 × 10−2 mm3 per m run, for tip diameters between 35 and 55 µm, respectively. MRR increases up to 9.6 × 10−2 mm3/m operating at −20 V (for a 55 µm tip). On ITO layers, the tip wear may increase up to a 20% using positive polarization. This is preliminary attributed to the impact of plasma ions on the tip metal during discharges. In any case, this issue shortens the probe length and may significantly affect the radius of a conical tip and hence the accuracy of patterns. These problems may be remedied with a suitable tip design (cylindrical shape) and with the integration of a damping system, like the rudimentary spring probe used, in order to correct the force of the tip over the surface. MMR can be reduced by using harder and more suitable materials. In Fig. 5(a), an array of grooves 15 µm width (dark stripes) were patterned on a 15 nm thick gold layer at −5 V. Inset shows a zoom corresponding to the dashed white rectangle to verify grooves quality. In this case, the irregular waviness with long period along the edges of the stripes is attributed to an artifact of the specific home-made cantilever. The cantilever was rudimentary built from a sharp metal probe (about 10 µm diameter) due to its very low cost. When the arm shape is not optimized, it may result in lateral vibrations during operation, causing this waviness. However, even in case of cancelling the mechanical swing of the probe, an intrinsic waviness along the edge of the patterned lines may be observed when working at high voltages, well above the operating threshold. In this case, the erosion progress is dominated by circle-like craters due to strong sparks. Figure 4 shows these features on ITO/glass layers. The upper groove was eroded at −20 V, showing an intrinsic ripple along the line edge due to the successive crater fronts. This undesirable effect degrades the pattern quality.
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FIG. 4. Grooves performed on ITO/glass in identical conditions but with different operating voltages, −20 V (upper) and −12 V (lower).
The lower groove was performed at −12 V, where this effect is much less pronounced and results in smoother edges. This suggests to work with not too high voltages above threshold. To test the electrical discharge lithography system on device performance, we have manufactured, by solution processing, 3 × 3 and 6 × 6 alphanumeric displays based on organic light emitting diode (OLED) passive matrix, using commercial poly[2-methoxy-5-(3′, 7′-dimethyloctyloxy)-1,4phenylenevinylene] (MDMO-PPV) as active layer. The OLED layer structure consists of ITO (100 nm)/PEDOT: PSS (50 nm)/ MDMO-PPV (70 nm)/Ca/Al, where PEDOT:PSS refers to the conductive polymer poly(3,4-ethylenedioxythiophene) polystyrene sulfonate. We highlight that both ITO anode and Al cathode were electrically patterned without using masks and chemicals. The re-alignment required for a proper cathode patterning was carried out by previous electrical detection of specific marks at the edge of the sample. The electrical eroded pattern performed on the ITO anode for the 6 × 6 pixel matrix is shown in Fig. 5(b). In Fig. 5(c), we can observe the operation of a central pixel (3 × 3 mm) in a 3 × 3 OLED
FIG. 6. (a) Optical micrograph of a straight groove patterned at 30 V on single-layer graphene. (b) AFM topographic image of the area enclosed by the dashed rectangle in (a). (c) AFM phase image of a magnified area including the edge.
display, resulting in 24 cd/m2 and 0.4 cd/A. The electrical and optical performances in terms of current-voltage characteristic (I-V) and electroluminescence (EL) spectra are shown in Fig. 5(d). Note that this technique allows selective removal of layers as long as the top layer is patterned at a voltage significantly below the bottom one: in this case, aluminum cathode was patterned at 3 V, an insufficient voltage to affect directly the ITO anode tracks (11 V, as mentioned above). Tests on commercial graphene single-layers on SiO2/Si: p+ substrates have also been performed. The sheet resistance of this graphene is close to 1 kΩ/sq, so conduction properties are
FIG. 5. (a) 15 µm stripes (dark bands) patterned on a 15 nm gold layer at −5 V performed with home-made cantilevers. (b) Isolated tracks in the ITO anode for a 6 × 6 pixel passive matrix. (c) MDMO-PPV based 3 × 3 OLED display working at 24 cd/m2 and 0.4 cd/A. (d) EL emission at different driving currents. Inset shows one pixel I-V curve.
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FIG. 7. Graphene micro-ribbons (1 µm × 1200 µm, separated by 11 µm) performed by electrical discharge lithography. (a) Magnified optical image of a micro-ribbon. (b) I2D Raman map corresponding to the rectangular marked area, 5 × 95 µm2. (c) Raman spectra recorded inside and outside the graphene ribbon.
far to be ideal. In consequence, the operating voltage needed for an optimal patterning is high compared to those used on ITO and conventional metals. A threshold voltage for electrical erosion was detected at about 20 V, but the best feature quality, in terms of edge sharpness and material removal, was obtained at 30 V. Patterning of graphene layers in room conditions is revealed as particularly successful due to the high rate of material removal and absence of residues, what leads to clearly defined edges. As an explanation, it has been proposed that the electron discharge is able to promote the chemical reaction of C atoms with surface adsorbed water. Thus, C is likely removed during the discharge by forming CO and CH4 gaseous species, avoiding residue accumulation.5,6 Microphotographs from a patterned line at 30 V (Fig. 6(a)), together with atomic force microscopy (AFM) topographic images (Figs. 6(b) and 6(c)) recorded at increasing magnifications, reveal high edge quality, as well as a good removal efficiency within a groove, as confirmed by Raman spectroscopy. Sharp edges of the pattern are remarkable. The poor contrast in the topographic AFM image of Fig. 6(b) is a result of the low step (about 1 nm) between the exposed SiO2 layer and graphene. In these conditions, as a matter of proof, a set of graphene micro-ribbons, 1 µm wide and up to 1.2 mm long, separated by bands of removed material 11 µm wide, has been patterned. The diameter of the tip was accurately measured resulting 11 µm, so the stepper displacement was arranged to obtain such high aspect ratio of about 1200:1. Final results can be observed in Fig. 7. A zoom corresponding to the marked rectangle (5 × 95 µm2) shows a micro-ribbon 1-2 µm wide (Fig. 7(a)). It is well known that Raman spectroscopy is a suitable technique for graphene characterization;7 in particular, the intensity of the I2D mode is the most sensitive feature to characterize the graphene quality. Fig. 7(c) shows an example of Raman spectra recorded in points from the inner and outer regions of the micro-ribbon (asterisk in Fig. 7(b), respectively). The spectrum inside the ribbon corresponds to that of pristine
single-layer CVD graphene on SiO2/Si, confirming the quality of the graphene, as well as its absence beyond the ribbon. In Fig. 7(b), the intensity of the I2D mode has been mapped along a two dimensional region including the ribbon, confirming a uniform quality, and a high contrast between the ribbon and its surroundings (in this case, Raman resolution is estimated to be around 0.7 µm). In conclusion, we have built a prototype for a subtractive lithography based on micro-electrical discharges, which allows single-step patterning in a wide range of scales, from microns to centimeters. Advantages and drawbacks over other subtractive techniques covering a similar range of scales, like laser ablation, have been discussed. With this system, we demonstrate the development of an OLED passive matrix where anode and cathode were patterned without using masks and chemicals. It shows especially good performance over graphene because of an almost complete absence of residues. Its versatility and precision has allowed obtaining an array of graphene micro-ribbons with an excellent aspect ratio, which is very promising for terahertz plasmonic applications.8 Funding by the Spanish Ministerio de Economía y Competitividad (MINECO) under Project No. MAT2012-37276C03 and Comunidad de Madrid Excellence Network under Project No. S2013/MIT-2740 is acknowledged. Alicia de Andrés and Esteban Climent, from Material Science Institute of Madrid (CSIC), are gratefully acknowledged for Raman characterization. 1J.
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2H.
