Data in Brief 10 (2017) 557–560
Contents lists available at ScienceDirect
Data in Brief journal homepage: www.elsevier.com/locate/dib
Data Article
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata Ali Newaz Bahar a, Mohammad Maksudur Rahman b, Nur Mohammad Nahid a, Md. Kamrul Hassan a a Department of Information and Communication Technology, Mawlana Bhashani Science and Technology University, Bangladesh b University Grants Commission of Bangladesh, Bangladesh
a r t i c l e i n f o
abstract
Article history: Received 24 November 2016 Received in revised form 13 December 2016 Accepted 24 December 2016 Available online 29 December 2016
This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T ¼2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed. & 2017 The Authors. Published by Elsevier Inc. This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/).
Keywords: Quantum-dot cellular Reversible logic gate QCAPro
Specifications Table Subject area More specific subject area Type of data How data was acquired Data format Data accessibility
Electronics Nano-electronics Table, figure QCADesigner and QCAPro tools have been used to acquire the data set Analyzed Data is within this article
E-mail address: [email protected] (A.N. Bahar). http://dx.doi.org/10.1016/j.dib.2016.12.050 2352-3409/& 2017 The Authors. Published by Elsevier Inc. This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/).
558
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
Value of the data
This data can help researchers who are going to design ultra-low power reversible system. The proposed circuit layout can be employed to design efficient large scale reversible system. Nano-communication system can be easily designed by implementing the proposed reversible gates.
1. Data This article describes the QCA implementation of the basic reversible gate such as: Double Feynman, Toffoli, TR, BJN, R, NG, SCL and BVF gates. Table 1 describe the energy dissipation dataset at different tunneling energy level, γ ¼ 0:5Ek ; γ ¼ 1Ek and γ ¼ 1:5Ek .
2. Experimental design, materials and methods 2.1. QCA implementation To design the proposed gates, a 5-input majority voter gate [1] based 3-input exclusive-OR gate has been used. QCADesigner with default simulation engine has been employed to simulate the proposed circuit layouts. The QCA representation of the proposed gates is shown in Fig. 1.
2.2. Power dissipation analysis In order to estimate the energy dissipation of proposed circuits, QCAPro [2] a power analyzing tools has been employed. The energy dissipation is analyzed in three different tunneling energy levels at 2 K temperature. The power dissipation by a QCA cell is calculated using the Hartree-Fock approximation. The Hamiltonian matrix of a mean-field approach is illustrated as [2–4]. 2 H¼4
Ek 2
P
i C i f i; j
γ
3 2 Ek γ Cj 1 þ Cj þ 1 2 4 5 ¼ Ek P γ i C i f i; j 2
3 γ 5 Ek 2 Cj 1 þ Cj þ 1
ð1Þ
Table 1 Energy dissipation analysis of proposed reversible logic gates at three different tunneling energy levels. Circuit
Leakage energy dissipation (meV)
Switching energy dissipation (meV)
Total energy dissipation (meV)
0.5 Ek Double Feynman gate 3.49 Toffoli gate 2.65 TR gate 5.06 BJN gate 3.23 R gate 4.98 NG gate 4.37 SCL gate 2.97 BVF gate 3.08
1.0 Ek
1.5 Ek
0.5 Ek
1.0 Ek
1.5 Ek
0.5 Ek
1.0 Ek
1.5 Ek
9.71 7.58 15.95 8.97 14.68 13.99 8.91 9.7
16.54 13.44 27.20 16.04 26.95 25.83 15.17 16.54
21.78 16.79 34.80 19.65 33.82 32.21 18.29 21.16
19.43 14.92 30.66 17.59 29.74 27.98 17.19 18.64
16.29 12.85 26.38 15.18 25.39 24.29 15.88 16.04
25.27 19.44 39.87 22.88 38.8 36.58 21.26 24.24
29.14 22.5 46.62 26.56 44.42 41.97 26.1 28.34
32.83 26.29 53.59 31.22 52.34 50.12 31.05 32.58
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
B P
Q
C
C
-1.00 A
559
-1.00
B
R
-1.00
R Q
B
A C
A
-1.00
P
-1.00
P
-1.00
R
-1.00 Q
Q
B
P
C
-1.00 C
-1.00
R
B A
-1.00
B R A -1.00
A
C
-1.00
-1.00 -1.00
Q Q
P
-1.00
P
R
R D
C Q
A
-1.00
C P
S
B
B
R D
Q -1.00 1.00
S -1.00
A -1.00 P
Fig. 1. QCA circuit layout of proposed (a) Double Feynman gate (b)Toffoli gate (c)TR gate (d)BJN gate €R gate (f)NG gate (g)SCL gate (h)BVF gate.
According to the upper bound power dissipation model [2] the power dissipation by a QCA cell is given as P diss ¼
Ediss T cc
*
0 ! 1 0 ! 13+ 2 ! ħ Г ħ Г ħ ! 6 ! Гþ Г B þ C B C 7 Гþ 4 ! tan h@ A þ ! tan h@ A5 k k T B BT 2T cc Гþ Г
ð2Þ
560
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
Transparency document. Supplementary material Transparency document associated with this article can be found in the online version at http://dx. doi.org/10.1016/j.dib.2016.12.050.
References [1] A.N. Bahar, S. Waheed, Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata, SpringerPlus (2016), http://dx.doi.org/10.1186/s40064-016-2220-7. [2] S.Srivastava, A.Asthana, S.Bhanja, S.Sarkar, QCAPro - an error-power estimation tool for QCA circuit design, in: Proceedings of the 2011 IEEE International Symposium of Circuits and Systems (ISCAS), pp. 2377–2380. doi: http://dx.doi.org/10.1109/ ISCAS.2011.5938081, 2011. [3] J. Timler, C.S. Lent, Power gain and dissipation in quantum-dot cellular automata, J. Appl. Phys. 91 (2002) 823–831. http: //dx.doi.org/10.1063/1.1421217. [4] S. Srivastava, S. Sarkar, S. Bhanja, Estimation of upper bound of power dissipation in QCA circuits, IEEE Trans. Nanotechnol. 8 (2009) 116–127. http://dx.doi.org/10.1109/TNANO.2008.2005408.
Contents lists available at ScienceDirect
Data in Brief journal homepage: www.elsevier.com/locate/dib
Data Article
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata Ali Newaz Bahar a, Mohammad Maksudur Rahman b, Nur Mohammad Nahid a, Md. Kamrul Hassan a a Department of Information and Communication Technology, Mawlana Bhashani Science and Technology University, Bangladesh b University Grants Commission of Bangladesh, Bangladesh
a r t i c l e i n f o
abstract
Article history: Received 24 November 2016 Received in revised form 13 December 2016 Accepted 24 December 2016 Available online 29 December 2016
This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T ¼2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed. & 2017 The Authors. Published by Elsevier Inc. This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/).
Keywords: Quantum-dot cellular Reversible logic gate QCAPro
Specifications Table Subject area More specific subject area Type of data How data was acquired Data format Data accessibility
Electronics Nano-electronics Table, figure QCADesigner and QCAPro tools have been used to acquire the data set Analyzed Data is within this article
E-mail address: [email protected] (A.N. Bahar). http://dx.doi.org/10.1016/j.dib.2016.12.050 2352-3409/& 2017 The Authors. Published by Elsevier Inc. This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/).
558
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
Value of the data
This data can help researchers who are going to design ultra-low power reversible system. The proposed circuit layout can be employed to design efficient large scale reversible system. Nano-communication system can be easily designed by implementing the proposed reversible gates.
1. Data This article describes the QCA implementation of the basic reversible gate such as: Double Feynman, Toffoli, TR, BJN, R, NG, SCL and BVF gates. Table 1 describe the energy dissipation dataset at different tunneling energy level, γ ¼ 0:5Ek ; γ ¼ 1Ek and γ ¼ 1:5Ek .
2. Experimental design, materials and methods 2.1. QCA implementation To design the proposed gates, a 5-input majority voter gate [1] based 3-input exclusive-OR gate has been used. QCADesigner with default simulation engine has been employed to simulate the proposed circuit layouts. The QCA representation of the proposed gates is shown in Fig. 1.
2.2. Power dissipation analysis In order to estimate the energy dissipation of proposed circuits, QCAPro [2] a power analyzing tools has been employed. The energy dissipation is analyzed in three different tunneling energy levels at 2 K temperature. The power dissipation by a QCA cell is calculated using the Hartree-Fock approximation. The Hamiltonian matrix of a mean-field approach is illustrated as [2–4]. 2 H¼4
Ek 2
P
i C i f i; j
γ
3 2 Ek γ Cj 1 þ Cj þ 1 2 4 5 ¼ Ek P γ i C i f i; j 2
3 γ 5 Ek 2 Cj 1 þ Cj þ 1
ð1Þ
Table 1 Energy dissipation analysis of proposed reversible logic gates at three different tunneling energy levels. Circuit
Leakage energy dissipation (meV)
Switching energy dissipation (meV)
Total energy dissipation (meV)
0.5 Ek Double Feynman gate 3.49 Toffoli gate 2.65 TR gate 5.06 BJN gate 3.23 R gate 4.98 NG gate 4.37 SCL gate 2.97 BVF gate 3.08
1.0 Ek
1.5 Ek
0.5 Ek
1.0 Ek
1.5 Ek
0.5 Ek
1.0 Ek
1.5 Ek
9.71 7.58 15.95 8.97 14.68 13.99 8.91 9.7
16.54 13.44 27.20 16.04 26.95 25.83 15.17 16.54
21.78 16.79 34.80 19.65 33.82 32.21 18.29 21.16
19.43 14.92 30.66 17.59 29.74 27.98 17.19 18.64
16.29 12.85 26.38 15.18 25.39 24.29 15.88 16.04
25.27 19.44 39.87 22.88 38.8 36.58 21.26 24.24
29.14 22.5 46.62 26.56 44.42 41.97 26.1 28.34
32.83 26.29 53.59 31.22 52.34 50.12 31.05 32.58
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
B P
Q
C
C
-1.00 A
559
-1.00
B
R
-1.00
R Q
B
A C
A
-1.00
P
-1.00
P
-1.00
R
-1.00 Q
Q
B
P
C
-1.00 C
-1.00
R
B A
-1.00
B R A -1.00
A
C
-1.00
-1.00 -1.00
Q Q
P
-1.00
P
R
R D
C Q
A
-1.00
C P
S
B
B
R D
Q -1.00 1.00
S -1.00
A -1.00 P
Fig. 1. QCA circuit layout of proposed (a) Double Feynman gate (b)Toffoli gate (c)TR gate (d)BJN gate €R gate (f)NG gate (g)SCL gate (h)BVF gate.
According to the upper bound power dissipation model [2] the power dissipation by a QCA cell is given as P diss ¼
Ediss T cc
*
0 ! 1 0 ! 13+ 2 ! ħ Г ħ Г ħ ! 6 ! Гþ Г B þ C B C 7 Гþ 4 ! tan h@ A þ ! tan h@ A5 k k T B BT 2T cc Гþ Г
ð2Þ
560
A.N. Bahar et al. / Data in Brief 10 (2017) 557–560
Transparency document. Supplementary material Transparency document associated with this article can be found in the online version at http://dx. doi.org/10.1016/j.dib.2016.12.050.
References [1] A.N. Bahar, S. Waheed, Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata, SpringerPlus (2016), http://dx.doi.org/10.1186/s40064-016-2220-7. [2] S.Srivastava, A.Asthana, S.Bhanja, S.Sarkar, QCAPro - an error-power estimation tool for QCA circuit design, in: Proceedings of the 2011 IEEE International Symposium of Circuits and Systems (ISCAS), pp. 2377–2380. doi: http://dx.doi.org/10.1109/ ISCAS.2011.5938081, 2011. [3] J. Timler, C.S. Lent, Power gain and dissipation in quantum-dot cellular automata, J. Appl. Phys. 91 (2002) 823–831. http: //dx.doi.org/10.1063/1.1421217. [4] S. Srivastava, S. Sarkar, S. Bhanja, Estimation of upper bound of power dissipation in QCA circuits, IEEE Trans. Nanotechnol. 8 (2009) 116–127. http://dx.doi.org/10.1109/TNANO.2008.2005408.
