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Cite this: DOI: 10.1039/x0xx00000x
Performance improvement of multilayer InSe transistors with optimized metal contacts Wei Fenga,b†, Xin Zhoua†, Wei Quan Tiana, Wei Zhenga,b, PingAn Hua*
Received 00th January 2012, Accepted 00th January 2012 DOI: 10.1039/x0xx00000x www.rsc.org/
This work is focused on achieving high performance multilayer InSe field-effect transistors by systematic experiment study on metal contact. The high performance can be achieved by choosing ideal contact metal and adopting proper thickness of InSe nanosheets. Choosing the proper thickness (33 nm), the performance of multilayer InSe FETs is improved by the following sequence of Al, Ti, Cr and In contacts. The extracted mobility values are 4.7 cm2V 1 -1 s , 27.6 cm2V-1 s-1, 74 cm2V -1s-1 and 162 cm2 V-1s-1 for Al, Ti, Cr and In, respectively. The on/off ratios are 10 7~10 8. Device electronic properties and interface morphology of deposition metals/InSe indicate that contact interface between metals and InSe play a significant role in forming low resistance. Our study may pave the way for multilayer InSe application in nanoelectrical and nano-optoelectronic devices.
1. Introduction As silicon-based transistors have approached its physical limits, it is important and urgent to explore alternative materials with a suitable band-gap and high mobility for next generation electronic logic devices. Two dimensional (2D)/thin-film layered semiconductors, with ultrathin thickness and absence of dangling bonds at surface, have capabilities that allow a large degree of electrostatic control, and significant device downscaling for high intensity integration as well as extinction of short channel effect.1 Recently, a variety of 2D/thin-film layered semiconductors have been explored, including graphene2,3 and transition metal dichalcogenides (TMDs, e.g. MoS2, WSe2)4, 5, III-VI binary chalcogenides (GaSe, GaS)6-8. Graphene, the first 2D material to undergo widespread application development, has proven to be a promising material for ultrafast electronics, wideband and high speed photodetectors due to its ultrahigh carrier mobility, wide-band absorption and short carrier lifetime.9-11 But graphene has no band-gap and thus its field effect transistors (FETs) exhibit no switching behavior, which limits its application in electrical logic circuit. TMDs such as MoS2, WS2 based transistors have been experimental and theoretically demonstrated, indicating great promises for low-power, high performance electronics devices for future digital applications.12-16 The contacts of metal/semiconductors in FETs play a central role in determining device performance since they control the charge injection into semiconductor channel. The success of modern silicon-based electronics is attributed to the understanding of metal/semiconductor interface and the fine control of charge injection into the channel materials through contact metals. Therefore, to obtain high performance thin-film layered semiconductor devices, the role of metal contact and interfaces of thin-film materials is a crucially scientific problem, which involves the chosen metals, configuration of contact and the understanding the interaction of metal/ thin-film channels. In thin-film layered semiconductor electronics, using metal contacts with proper work
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functions can improve device performance by reducing contact barriers.17 High performance thin-film MoS2 transistors have been demonstrated by using low work function metal contact of scandium (Sc).18 However, the contact resistance between metals and thin-film semiconductors junction is still higher than expected. To concern this unexpected phenomenon of electrical behavior in 2D/thin-film layered semiconductor electronics, first principles calculations have been performed on the metal-TMDs contacts, revealing that the nature of contacts (the geometry, bonding, and electronic structure of the contact region) also plays a vital role in determining the device performance.19 Recently, n-type transistor based on monolayer WSe2 exhibited high mobility using proper metal and optimizing the interface nature of metal/WSe2.16 Despite of those efforts, the understanding of interface nature of metal and thin-film layered semiconductor remains obscure, especially there is still lacking in solid evidences to reveal the interaction nature between metal and thin-film layered semiconductor without dangling bonds at surfaces. In addition, previous attentions have been focused on graphene and 2D/thin-film TMDs semiconductors, whereas few investigations are performed on other 2D/thin-film layered materials such as III-VI group layered semiconductors.6-8 In this paper, we present comprehensive and solid simulations and experiments on the interface of metals/multilayer InSe, and hope to provide guideline to obtain high performance electronics based on thin-film III-VI group layered semiconductors or other layered semiconductors. InSe is a typical member of layered materials from III-VI group, which is vertically stacked by Se-In-In-Se layer with relatively weak van der Waals interactions. Bulk InSe is a direct semiconductor with band-gap of 1.26 eV and possesses good thermal stability (660 ℃).20 Compared to MoS2 which has a heavier electron effective mass (m* = 0.45 m0)21 and low room temperature mobility of 50~ 200 cm2V-1s1 5, 22 , InSe has lighter electron effective mass (m* = 0.143 m0)23, and show a high carrier mobility of ~ 103 cm2V-1s-1,24 which makes it as potential material for high mobility electronic devices. Recently strong quantization effects have been observed in the exfoliated 2D
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DOI: 10.1039/C4CP04968C
Physical Chemistry Chemical Physics
InSe.25 Characterization and photodetector of thin-film InSe have also been carried out.26 In this letter, we show an experimental study on contacts of multilayer InSe with aluminum (Al), titanium (Ti), chromium (Cr) and indium (In) using back-gated FETs. All backgated FETs based on thin-film InSe with different contact metals show n-channel transistor behaviors. The FETs performance is strongly dependent on contact metals. The extracted mobility values are 4.7 cm2V-1s-1, 27.6 cm2V-1s-1, 74 cm2V-1s-1 and 162 cm2V-1s-1 for these Al, Ti, Cr and In contacts, respectively. The experiment results of devices performance and morphology of metals deposited on multilayer InSe demonstrate that the contact resistance is dominated by the condition of contact between metals and thin-film InSe. In addition, the device performance also depends on thickness of channel. The mobility as function of channel thickness in thin-film InSe FETs is also investigated to obtain the optimized channel thickness.
2. Experimental section
Journal Name DOI: 10.1039/C4CP04968C zone axis and has a good crystalline quality. The multilayer InSe nanosheets are fabricated by micro-mechanical exfoliation of the synthesized bulk InSe and subsequently transferred to 300 nm SiO2/Si substrates. A typical optical image of multilayer InSe is shown in Fig.1c. The color contrast varies with the thickness of InSe sheets. Raman spectroscopy is a convenient and nondestructive measurement tools for identifying thin-film layered materials. It is well studied that the thickness of TMDs can be identified by the Raman spectrum, because of the peak position varies with TMDs thickness (< 10L).27 However, the early report demonstrates that the positions of the absorption peaks of InSe sheets do not varies with the thickness above 5 nm.25 Fig. S1 shows the Raman spectra of 20 nm and bulk InSe, and three peaks at A11g (117.3 cm-1), E12g (178.4 cm-1) and A12g (229.5 cm-1) are shown in all samples. Though the peak position is constant, the intensity varies with thickness. Fig.1d shows a Raman map of the A11g peak intensity. The intensity of Raman peak reflects the thickness of InSe sheets, suggesting the peak intensity can be applied to estimate the thickness, which is similar to the phenomena of ultrathin WSe2.16
Synthesis of InSe: The bulk InSe crystals were prepared by the following procedure: Selenium powder and indium were put in two quartz boats, respectively. Then the boats were placed into a twozone horizontal furnace with a fused silica tube and separated 20 cm between them. The close system was purged with 100 sccm Ar gas for 30 min. The boats with In and Se were heated to 973 K and 673 K, respectively, and kept at these temperature for 2 h with 10 sccm Ar gas. Then the system was cooled to room temperature by nature. Characterization: The structure was observed by transmission electron microscopy (TEM), selected area electron diffraction (SAED) and energy dispersive X-ray spectroscopy (EDS) (FEITECNAI High Resolution TEM operated at 300 kV). The InSe nanoflakes were transferred to lacey support films for TEM tests by ultrasound in ethanol. Optical images of InSe nanoflakes were taken with an OLYMPUS BX41. The thickness and roughness were determined by using atomic force microscopy (AFM, Nanoscope IIIa Vecco). The wavelength and intensity of the laser used for Raman spectroscopy is 532 nm and 1 mW, respectively (LabRAM XploRA). Devices fabrication and electrical characterization: The multilayer InSe nanosheets were mechanically peeled from bulk InSe crystals and transferred onto the silicon substrate which coated 300 nm SiO2. Metals electrodes were fabricated using a shadow mask by thermal evaporation. Au is deposited as a capping layer for all of the contact metals (Au/metals = 40/10 nm). Electrical characterizations of transistors based on multilayer InSe devices were performed by using a semiconductor characterization system (Keithley 4200 SCS) with a Lakeshore probe station at room temperature.
3. Result and discussion Fig. 1a shows the crystal structure of InSe consisting of Se-In-In-Se layers with thickness of 0.69 nm. The top view of InSe crystal structure shows a typical hexagonal rings structure. The InSe sample was synthesized by chemical vapor deposition (CVD) as described in methods. The synthesized InSe samples are characterized by transmission electron microscopy (TEM) and Raman spectroscopy. Fig. 1b presents a high resolution TEM (HRTEM) image of InSe, which shows an ideal hexagonal lattice structure, with a 0.34 nm distance corresponding to the lattice constant of (100) direction. The selected area electron diffraction (SAED) (Fig. 1b inset) shows a 6fold symmetry, indicating that the synthesized InSe orientate along
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Fig. 1 Characterization of InSe sheet: (a) InSe crystal structure: top is side view of InSe lattice structure and down is top view of InSe crystal structure. (b) HRTEM images of few layer InSe. The inset is the corresponding SAED pattern. (c) The optical image of multilayer InSe nanosheets. (d) The corresponding Raman mapping of intensity of A1g peak. The wavelength and intensity of the laser used for Raman spectroscopy is 532 nm and 1 mW, respectively. Thin-film InSe in the thickness range of 10~50 nm are used in this study. Multilayer InSe FETs were fabricated on 300 nm SiO2/Si substrates using a shadow mask combined with metals thermal evaporation. Fig. 2a shows the 3D schematic of back-gated InSe FETs. An optical image of InSe FETs is shown in Fig. 2b, and the corresponding AFM image and AFM height profile are presented in Fig. S2 of supplementary information. The channel thickness is 33 nm (Fig. S2-b, supplementary information). The electrical characteristics of thin-film InSe back-gated FETs with Cr/Au contacts are measured under the ambient environment. The transfer curves obtained at a bias of Vds = 1 V (Fig. 2c ) exhibit a typical ntype channel behavior with turning on at positive gate biases, which indicates that the Fermi levels for Cr is close to the conduction band bottom of InSe, resulting in electron injection. A very small recovery of drain current at large negative Vg is shown in Fig. 2c due to the inversion channel condition. The band of multilayer InSe can be bent by the gate bias because of the nature of InSe with low density of
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Journal Name states. However, the Schottky barrier height is smaller for electron while larger for hole transport, leading to small hole currents and high electron currents. Fig.2d shows the corresponding output characteristics of thin-film InSe FETs with Cr/Au contacts. The current shows a linear increasing within low Vds range and a saturation condition during high Vds, which is well in agreement with the current saturation behavior of conventional long-channel ntype metal oxide semiconductor (NMOS) transistors. The saturation of current in InSe FETs is caused by the conducting channel converting to “pinch-off” condition applying enough high Vds. This saturation feature of current is an important factor for the practical applications in digital circuits in order to reach maximum possible operation speeds. Similar performance is observed in thin-film MoS2 FETs,22 which is absent in graphene FETs because of its zero bandgap structure. The mobility and on/off ratio are both critical parameters to evaluate the performance of a FET. The mobility of multilayer InSe FETs can be extracted from the linear region in Fig. 2c using the equation: µ = [L/(WCiVds)]×[dIds/dVg], where L is the channel length of 20 µm, W is the channel width of 20 µm, Ci is the capacitance of dielectric (Ci =ε0ε0/d), ε0 = 8.854×10-12 Fm-1 is the vacuum permittivity, ε0 is 3.9 for SiO2 and d (300 nm) is the thickness of SiO2. The calculated mobility value is 74 cm2V-1s-1 for Cr/InSe FET, which is higher that of MoS2 FETs based on 300 nm SiO2 substrate.5 The current on/off ratio is calculated by adopting ratio of maximum to minimum Ids from curves of Ids-Vg. The extracted on/off ratio value is 5×107 for Cr/InSe FET, which is higher than that of thin-film MoS2 FETs of 106 and comparable to single layer MoS2 top-gated FETs of 108.5, 22 The high current on/off ratio of thin-film InSe FETs meet with the requirements of practical application that the current on/off ratio must excess 104 for potential candidate materials replacing the silicon in CMOS digital logic devices.3
Fig. 2 (a) Schematic of back-gated thin-film InSe FETs consisting of a SiO2 back gate insulator (300 nm). (b) Optical image of fabricated
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ARTICLE DOI: 10.1039/C4CP04968C thin-film InSe FETs. (c) Transfer characteristics of back-gated 33 nm thin-film InSe back-gated FETs with Cr metal contacts for Vds = 1 V. (d) Corresponding output characteristics. Device configuration (length/width): Cr 20 µm/20 µm. All measured are performed at room temperature under ambient environment. (e) Transfer curves as function of the InSe thickness. (f) The extracted effective mobility as function of the InSe thickness. The performance of back-gated InSe FETs as a function of channel thickness ranging from 10 to 50 nm was investigated using Cr/Au as contact metal. Fig. 2e and Fig. S3 (supplementary information) exhibit the transfer curves and corresponding output curves of 10 nm, 15 nm, 21 nm and 33 nm multilayer InSe FETs, respectively. From Fig. 2e, we extract the mobility values for various thicknesses as shown in Fig. 2f. The mobilities show a nonmonotonic trend upon the thickness variance (Fig. 2f). The mobility rapidly increases from 2 cm2V-1s-1 to 74 cm2V-1s-1 as InSe thickness changing from 10 nm to 33 nm, then the value of mobility decreases to 37 cm2V-1s-1 with channel thickness increasing to 50 nm. A peak value of mobility occurs at 33 nm. Similar phenomena have been observed in the FETs of multilayer MoS2,18 graphene28 and black phosphorus.29 High performance thin-film InSe FETs can be achieved using the InSe thickness in the range of 30-40 nm. The thickness dependent mobilities of InSe nanosheets FETs can well be understood by a resistor network model (supplementary information, Fig. S4), which has been well used to explain the thickness related transport properties of the FETs based on multilayer graphene,28 MoS218 and black phosphorus29. To explore the impact of metal contacts on electrical performances of the devices, the simplest model is proposed that the barriers between thin-film InSe semiconductors and metals are given by the equation: Φb = Φ-χ, where Φ is the work function and χ is the semiconductor electron affinity.30 This simple model has successfully been applied in some nanoscale contacts such as the contact to carbon nanotubes.30 To achieve low contact resistance at interface of metals and thin-film InSe using above model, several metals with low work functions are chosen in our study including Al, Ti, Cr and In as shown in Fig. 3a. Electron injection can occur for all metals because the work functions of the selected metals are close to the conduction band. Fig. 3b presents the expected electronic characteristics of InSe transistors with different metal contacts, which are obtained on the base of such assumption that contact barrier height is determined by the work function of metal. Al has the smallest work function among the selected metal contacts, so InSe FETs with Al contacts are expected to have highest performance (Fig. 3b), and the performance of InSe FETs with different contacts are increased in the order of Cr, Ti, In and Al (Fig. 3b). To test such assumption by experiments, the thin-film InSe FETs with the same device configuration (channel thickness: ~30 nm, channel length: 20 µm, width: 20 µm) are fabricated on SiO2/Si (300 nm SiO2) using Cr, Ti, In and Al, respectively. The electrical measurements of devices are performed under the ambient environment. The experimental transfer (Ids-Vg) and output (Ids-Vds) characteristics of thin-film InSe FETs with different metal contacts are shown in Fig. 3c and Fig. 3d-f, respectively. The contact resistance can be roughly calculated by the linear region of the IdsVds curves at applying high Vg as described in early report.22 The contact resistance of the Al-InSe, Ti-InSe, Cr-InSe and In-InSe FETs are estimated to be 5.4×108 Ωµm-1, 3.4 × 104 Ωµm-1, 1.1 × 104 Ωµm1 and 1.9 × 103 Ωµm-1, respectively. The Al-InSe FETs show the
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highest contact resistance, which agrees with the electrical performance. The transconductance gm, defined as gm = dIds/dVg, is important trait to evaluate the performance of FETs. The gm values, which extracted from InSe devices with different metal contacts, are 0.09 µS for Al, 0.45 µS for Ti, 0.8 µS for Cr and 2.0 µS for In, respectively. Furthermore, the extracted field–effect mobilities are 4.7 cm2V-1s-1, 26.9 cm2V-1s-1, 74 cm2V-1s-1 and 162 cm2V-1s-1 for Al, Ti, Cr and In -contacted devices, respectively, which are agreement with the variety trends of gm values for different contacts. The higher gm and mobility values of Cr-InSe and In-InSe FETs can be attributed to the smaller contact resistance.21 The on/off ratio value is 107, 106, 107 and 108 for Al, Ti, Cr and In contacts as shown in Fig. S5, respectively. All on/off ratio values achieve the requirements of practical application in Complementary Metal Oxide Semiconductor (CMOS) digital logic devices. These experimental results are obviously conflicted with the expected device performance shown in Fig. 3a-3b. For example, the InSe FETs with Al contacts, which are expected to have highest performance, exhibit a lowest transconductance and mobility in experiments, which is contrary to the result concluded from work function alone. The observation of the low performance in the devices with Al contacts is attributed to the formation of high resistance Schottly contacts between Al-InSe.
Fig.3. (a) Band structure of contact metals, SiO2 and InSe. The Ec and Ev represent the conduction and valence band edges of InSe, respectively. (b) Schematic of expected devices performance based on work function alone. (c) Transfer characteristics of back-gated 33 nm thin-film InSe back-gated FETs with Al, Ti, Cr and In metal contacts for Vds = 1 V. Output characteristics of 33 nm thin-film InSe back-gated FETs for (d) Al, (e) Ti and (f) In metal contacts, respectively. Device configuration (length/width): Al is 24 µm/20 µm, Ti is 20 µm/20 µm and In is 20 µm/20 µm. The saturation current regime under high Vds is also observed in Al and Ti contacts devices as shown in Fig. 3d, 3e. However, the
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Journal Name DOI: 10.1039/C4CP04968C current through In contacts devices shows a slight saturation even at Vg = 20 V and Vds = 5 V, indicating higher ON current is possible. Though In-InSe FETs show the highest devices performance, absent current saturation is a fatal drawback for In as contact metal application in thin-film InSe FETs for the practical applications in digital circuits in order to reach maximum possible operation speeds. Choosing a suitable contact metals, high electrical conductivity is not the only factor, good chemical and thermal stability are also important. The poor chemical stability and low melting point of In also may hinder its application as contact metal. The electrical studies of devices indicate that contact resistance of metals/multilayer InSe is not controlled by the work function of the metals as the existing models of electrical contacts, which is possibly caused by the unusual interaction interface of metal/InSe. So the nature of InSe/metals contact interface, which is crucial for devices performance, is directly investigated by using Raman spectroscopy and AFM. Four contact metals of Al, Ti, Cr and In with an average thickness of 2 nm are deposited onto the surface of multilayer InSe by thermal evaporation, respectively. The Fig. 4a shows schematic of contact metals deposited on multilayer InSe. The Raman spectrums show no variance to the samples between InSe alone and metal film/InSe (shown in Fig. 4b), suggesting that the interfaces of the deposited metals and InSe are van der Waals epitaxial (physical contact) hetero-junctions rather than the alloys that easily formed in metal/Si contacts as expected.30, 32 This physical interaction at the interface of metal/ multilayer InSe is caused by the stable InSe surface without dangling bonds, and differs from the nature of metal alloys in traditional metal/semiconductors contacts.30 Furthermore, the surface morphologies of metal film deposited on multilayer InSe were characterized by AFM as shown in Fig. 4c-f. Indium on multilayer InSe has a smooth film morphology with rms roughness of 0.32 nm, while Cr films on InSe have a relatively rough structure with rms roughness of 0.45 nm. Ti and Al films on InSe have more rough morphology consisting of clusters with rms roughness of 0.50 nm and 0.58 nm, respectively. The roughness value presents smooth wetability of metals on InSe, and rough surface of metals film results in intimate regions and remote contacts with multilayer InSe, which degrade the electron transport across the interfaces of contact metals and InSe. The morphologies of metals film are closely related to the interaction between metal and InSe, and impact electronic properties of InSe devices.17, 31, 32 Actually, the qualities of the four metal films on multilayer InSe surface (roughness) are accorded well with the varying trends of the measured performance in InSe FETs with different metals. It is well studied that clustering of adsorbates on surface depends on the relative values of inter-adsorbate and adsorbate-substrate interactions. AFM results suggest that interaction of Al and InSe is the weakest among the four metals. The interaction of metals and multilayer InSe are van der Waals epitaxy hetero-junctions, which are consistent with the condition of single layer WSe2 FETs.16, 19 Liu etc. demonstrate that d-orbitals of the contact metals play a key role in forming low resistance ohmic contacts with monolayer WSe2 by experimental and theory calculation.16,19 The theoretical work indicates that contact resistance is controlled by metal work function and sufficient strength of orbital overlap metals between metals and TMDs. Metals with small work function are more likely to form zero or negative Schottly barrier with TMDs, which is important for good contact between metals and bulk semiconductors. Metals with d-orbitals lead to form small interlayer distance and a zero tunnel barrier at the interface.16, 19 This theory also can be applied to our multilayer InSe system. Compared to other three metals in our work, Al without d-orbital has the smallest overlap of electronic orbits with
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Journal Name InSe, resulting in the weakest interactions with InSe. The other three contact metals with d-orbits can have overlap with the orbitals of InSe, leading to stronger interactions. The stronger interactions can produce more intimate contacts with semiconductors, which are beneficial for electron injection and forming lower contact resistance. Multilayer InSe FETs with In contact show the best performance, due to In own low work function and more d-orbitals (4d10) compared to Ti (3d2) and Cr (3d5) with higher work function and fewer d-orbitals. This behavior is consistent with the facts that electrical properties of InSe FETs are controlled by contact metals. All these results provide a general rule for designing low resistance contacts for high performance FETs based on multilayer InSe layered semiconductors.
ARTICLE DOI: 10.1039/C4CP04968C Ti, Cr and In. Most of the devices show a current saturation region at high drain-source voltage except In-InSe FETs. The thickness dependent mobilities show a nonmonotonic trend. Multilayer InSe FETs with In contact achieve a high electron mobility of 162 cm2V-1s-1with high current on/off ratio of 108. The direct characterization of the physical nature of the interaction between metals and multilayer InSe was performed using Raman spectroscopy and AFM. The device performance and the interface morphology of deposition metals/InSe indicate that low resistance in metals-InSe interface strongly depends on the physical states of contact metals and InSe. Our results provide a general guidelines and rules to design low resistance contact for high performance FETs based on thinfilm layered semiconductors.
Acknowledgements This work is supported by the National Natural Science Foundation of China (NSFC, No.61172001, 21373068, 21303030), the National key Basic Research Program of China (973 Program) under Grant No. 2013CB632900. WQT thanks financial support from the State Key Lab of Urban Water Resource and Environment (HIT) (2014TS01) and the Open Project of State Key Laboratory of Supramolecular Structure and Materials (JLU) (SKLSSM201404).)
Notes and references a
Academy of Fundamental and Interdisciplinary Science, Harbin Institute of Technology, Harbin, 150080, People's Republic of China. b School of Materials Science and Engineering, Harbin Institute of Technology, Harbin, 150080, China. Electronic Supplementary Information (ESI) available: The Raman spectrums, AFM of device, output curves as function of the InSe thickness, resistor network model of multilayer InSe FETs, logic transfer of multilayer InSe FETs with various metal contacts. See DOI: 10.1039/b000000x/
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5 Fig. 4 Direct characterization of interaction between InSe/Metals: (a) Schematic of contact metals deposited on multilayer InSe. (b) Raman spectrums of 2 nm contact metals deposited on multilayer InSe. The rms values of roughness for contact metals and AFM image of 2 nm (c) Al, (d) Ti, (e) Cr and (f) In on multilayer InSe.
4. Conclusions In summary, we have performed systematic experimental studies for understanding the interface nature of metal/ multilayer InSe, which is crucial to design a proper metal contact for high performance of thin-film InSe FETs. The FETs with metal contacts of Al, Ti, Cr and In as were measured. All these FETs show n-channel transistor behaviors with significantly increased mobilities in the contact sequence of Al,
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Y. Yoon, K. Ganapathi and S. Salahuddin, Nano Lett. 2011, 11, 3768. H. Wang, L. Yu, Y.-H. Lee, Y. Shi, A. Hsu, M. L. Chin, L.-J. Li, M. Dubey, J. Kong and T. Palacios, Nano Lett. 2012, 12, 4674. H. Fang, S. Chuang, T. C. Chang, K. Takei, T. Takahashi and A. Javey, Nano Lett. 2012, 12, 3788. W. Liu, J. Kang, D. Sarkar, Y. Khatami, D. Jena and K. Banerjee, Nano Lett. 2013, 13, 1983. I. Popov, G. Seifert and D. Tománek, Phys. Rev. Lett. 2012, 108, 156802. S. Das, H.-Y. Chen, A. V. Penumatcha and J. Appenzeller, Nano Lett. 2012, 13, 100. J. Kang, D. Sarkar, W. Liu, D. Jena and K. Banerjee, IEEE Int. Electron Devices Meet. 2012, 407-410. A. Chevy, A. Kuhn and M.-S. Martin, J. Cryst. Growth 1977, 38, 118. S. Lebegue and O. Eriksson, Phys. Rev. B 2009, 79, 115409. S. Kim, A. Konar, W.-S. Hwang, J. H. Lee, J. Lee, J. Yang, C. Jung, H. Kim, J.-B. Yoo and J.-Y. Choi, Nat. Commun. 2012, 3, 1011. N. Kuroda and Y. Nishina, Solid State Commun. 1980, 34, 481. K. Imai, K. Suzuki, T. Haga, Y. Hasegawa and Y. Abe, J. Cryst. Growth 1981, 54, 501. G. W. Mudd, S. A. Svatek, T. Ren, A. Patanè, O. Makarovsky, L. Eaves, P. H. Beton, Z. D. Kovalyuk, G. V. Lashkarev and Z. R. Kudrynskyi, Adv. Mater. 2013, 25, 5714. S. Lei, L. Ge, S. Najmaei, A. George, R. Kappera, J. Lou, M. Chhowalla, H. Yamaguchi, G. Gupta and R. Vajtai, ACS nano 2014, 8, 1263. H. Li, Q. Zhang, C. C. R. Yap, B. K. Tay, T. H. T. Edwin, A. Olivier and D. Baillargeat, Adv. Funct. Mater. 2012, 22, 1385. Y. Sui and J. Appenzeller, Nano Lett. 2009, 9, 2973. L. Li, Y. Yu, G. J. Ye, Q. Ge, X. Ou, H. Wu, D. Feng, X. H. Chen and Y. Zhang, Nat. Nanotechnol. 2014. F. Léonard and A. A. Talin, Nat. Nanotechnol. 2011, 6, 773. W. Chen, E. J. Santos, W. Zhu, E. Kaxiras and Z. Zhang, Nano Lett. 2013, 13, 509. C. Gong, C. Huang, J. Miller, L. Cheng, Y. Hao, D. Cobden, J. Kim, R. S. Ruoff, R. M. Wallace and K. Cho, ACS nano 2013, 7, 11350.
Physical Chemistry Chemical Physics Accepted Manuscript
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The table of contents entry Solid experimental investigations were performed to reveal the particular interface nature of thin-film indium selenide (InSe) layered semiconductor/metals. Multilayer InSe transistors show significantly increased mobilities in the contact sequence of aluminum, titanium, chromium and indium. Interface nature of metal/thin-film InSe layered semiconductor is strong van der Waals epitaxial interaction companying with d-orbital overlap. Title: Performance improvement of transistors with optimized metal contacts
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multilayer
InSe
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Performance improvement of multilayer InSe transistors with optimized metal contacts Wei Fenga,b†, Xin Zhoua†, Wei Quan Tiana, Wei Zhenga,b, PingAn Hua*
Received 00th January 2012, Accepted 00th January 2012 DOI: 10.1039/x0xx00000x www.rsc.org/
This work is focused on achieving high performance multilayer InSe field-effect transistors by systematic experiment study on metal contact. The high performance can be achieved by choosing ideal contact metal and adopting proper thickness of InSe nanosheets. Choosing the proper thickness (33 nm), the performance of multilayer InSe FETs is improved by the following sequence of Al, Ti, Cr and In contacts. The extracted mobility values are 4.7 cm2V 1 -1 s , 27.6 cm2V-1 s-1, 74 cm2V -1s-1 and 162 cm2 V-1s-1 for Al, Ti, Cr and In, respectively. The on/off ratios are 10 7~10 8. Device electronic properties and interface morphology of deposition metals/InSe indicate that contact interface between metals and InSe play a significant role in forming low resistance. Our study may pave the way for multilayer InSe application in nanoelectrical and nano-optoelectronic devices.
1. Introduction As silicon-based transistors have approached its physical limits, it is important and urgent to explore alternative materials with a suitable band-gap and high mobility for next generation electronic logic devices. Two dimensional (2D)/thin-film layered semiconductors, with ultrathin thickness and absence of dangling bonds at surface, have capabilities that allow a large degree of electrostatic control, and significant device downscaling for high intensity integration as well as extinction of short channel effect.1 Recently, a variety of 2D/thin-film layered semiconductors have been explored, including graphene2,3 and transition metal dichalcogenides (TMDs, e.g. MoS2, WSe2)4, 5, III-VI binary chalcogenides (GaSe, GaS)6-8. Graphene, the first 2D material to undergo widespread application development, has proven to be a promising material for ultrafast electronics, wideband and high speed photodetectors due to its ultrahigh carrier mobility, wide-band absorption and short carrier lifetime.9-11 But graphene has no band-gap and thus its field effect transistors (FETs) exhibit no switching behavior, which limits its application in electrical logic circuit. TMDs such as MoS2, WS2 based transistors have been experimental and theoretically demonstrated, indicating great promises for low-power, high performance electronics devices for future digital applications.12-16 The contacts of metal/semiconductors in FETs play a central role in determining device performance since they control the charge injection into semiconductor channel. The success of modern silicon-based electronics is attributed to the understanding of metal/semiconductor interface and the fine control of charge injection into the channel materials through contact metals. Therefore, to obtain high performance thin-film layered semiconductor devices, the role of metal contact and interfaces of thin-film materials is a crucially scientific problem, which involves the chosen metals, configuration of contact and the understanding the interaction of metal/ thin-film channels. In thin-film layered semiconductor electronics, using metal contacts with proper work
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functions can improve device performance by reducing contact barriers.17 High performance thin-film MoS2 transistors have been demonstrated by using low work function metal contact of scandium (Sc).18 However, the contact resistance between metals and thin-film semiconductors junction is still higher than expected. To concern this unexpected phenomenon of electrical behavior in 2D/thin-film layered semiconductor electronics, first principles calculations have been performed on the metal-TMDs contacts, revealing that the nature of contacts (the geometry, bonding, and electronic structure of the contact region) also plays a vital role in determining the device performance.19 Recently, n-type transistor based on monolayer WSe2 exhibited high mobility using proper metal and optimizing the interface nature of metal/WSe2.16 Despite of those efforts, the understanding of interface nature of metal and thin-film layered semiconductor remains obscure, especially there is still lacking in solid evidences to reveal the interaction nature between metal and thin-film layered semiconductor without dangling bonds at surfaces. In addition, previous attentions have been focused on graphene and 2D/thin-film TMDs semiconductors, whereas few investigations are performed on other 2D/thin-film layered materials such as III-VI group layered semiconductors.6-8 In this paper, we present comprehensive and solid simulations and experiments on the interface of metals/multilayer InSe, and hope to provide guideline to obtain high performance electronics based on thin-film III-VI group layered semiconductors or other layered semiconductors. InSe is a typical member of layered materials from III-VI group, which is vertically stacked by Se-In-In-Se layer with relatively weak van der Waals interactions. Bulk InSe is a direct semiconductor with band-gap of 1.26 eV and possesses good thermal stability (660 ℃).20 Compared to MoS2 which has a heavier electron effective mass (m* = 0.45 m0)21 and low room temperature mobility of 50~ 200 cm2V-1s1 5, 22 , InSe has lighter electron effective mass (m* = 0.143 m0)23, and show a high carrier mobility of ~ 103 cm2V-1s-1,24 which makes it as potential material for high mobility electronic devices. Recently strong quantization effects have been observed in the exfoliated 2D
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Physical Chemistry Chemical Physics Accepted Manuscript
DOI: 10.1039/C4CP04968C
Physical Chemistry Chemical Physics
InSe.25 Characterization and photodetector of thin-film InSe have also been carried out.26 In this letter, we show an experimental study on contacts of multilayer InSe with aluminum (Al), titanium (Ti), chromium (Cr) and indium (In) using back-gated FETs. All backgated FETs based on thin-film InSe with different contact metals show n-channel transistor behaviors. The FETs performance is strongly dependent on contact metals. The extracted mobility values are 4.7 cm2V-1s-1, 27.6 cm2V-1s-1, 74 cm2V-1s-1 and 162 cm2V-1s-1 for these Al, Ti, Cr and In contacts, respectively. The experiment results of devices performance and morphology of metals deposited on multilayer InSe demonstrate that the contact resistance is dominated by the condition of contact between metals and thin-film InSe. In addition, the device performance also depends on thickness of channel. The mobility as function of channel thickness in thin-film InSe FETs is also investigated to obtain the optimized channel thickness.
2. Experimental section
Journal Name DOI: 10.1039/C4CP04968C zone axis and has a good crystalline quality. The multilayer InSe nanosheets are fabricated by micro-mechanical exfoliation of the synthesized bulk InSe and subsequently transferred to 300 nm SiO2/Si substrates. A typical optical image of multilayer InSe is shown in Fig.1c. The color contrast varies with the thickness of InSe sheets. Raman spectroscopy is a convenient and nondestructive measurement tools for identifying thin-film layered materials. It is well studied that the thickness of TMDs can be identified by the Raman spectrum, because of the peak position varies with TMDs thickness (< 10L).27 However, the early report demonstrates that the positions of the absorption peaks of InSe sheets do not varies with the thickness above 5 nm.25 Fig. S1 shows the Raman spectra of 20 nm and bulk InSe, and three peaks at A11g (117.3 cm-1), E12g (178.4 cm-1) and A12g (229.5 cm-1) are shown in all samples. Though the peak position is constant, the intensity varies with thickness. Fig.1d shows a Raman map of the A11g peak intensity. The intensity of Raman peak reflects the thickness of InSe sheets, suggesting the peak intensity can be applied to estimate the thickness, which is similar to the phenomena of ultrathin WSe2.16
Synthesis of InSe: The bulk InSe crystals were prepared by the following procedure: Selenium powder and indium were put in two quartz boats, respectively. Then the boats were placed into a twozone horizontal furnace with a fused silica tube and separated 20 cm between them. The close system was purged with 100 sccm Ar gas for 30 min. The boats with In and Se were heated to 973 K and 673 K, respectively, and kept at these temperature for 2 h with 10 sccm Ar gas. Then the system was cooled to room temperature by nature. Characterization: The structure was observed by transmission electron microscopy (TEM), selected area electron diffraction (SAED) and energy dispersive X-ray spectroscopy (EDS) (FEITECNAI High Resolution TEM operated at 300 kV). The InSe nanoflakes were transferred to lacey support films for TEM tests by ultrasound in ethanol. Optical images of InSe nanoflakes were taken with an OLYMPUS BX41. The thickness and roughness were determined by using atomic force microscopy (AFM, Nanoscope IIIa Vecco). The wavelength and intensity of the laser used for Raman spectroscopy is 532 nm and 1 mW, respectively (LabRAM XploRA). Devices fabrication and electrical characterization: The multilayer InSe nanosheets were mechanically peeled from bulk InSe crystals and transferred onto the silicon substrate which coated 300 nm SiO2. Metals electrodes were fabricated using a shadow mask by thermal evaporation. Au is deposited as a capping layer for all of the contact metals (Au/metals = 40/10 nm). Electrical characterizations of transistors based on multilayer InSe devices were performed by using a semiconductor characterization system (Keithley 4200 SCS) with a Lakeshore probe station at room temperature.
3. Result and discussion Fig. 1a shows the crystal structure of InSe consisting of Se-In-In-Se layers with thickness of 0.69 nm. The top view of InSe crystal structure shows a typical hexagonal rings structure. The InSe sample was synthesized by chemical vapor deposition (CVD) as described in methods. The synthesized InSe samples are characterized by transmission electron microscopy (TEM) and Raman spectroscopy. Fig. 1b presents a high resolution TEM (HRTEM) image of InSe, which shows an ideal hexagonal lattice structure, with a 0.34 nm distance corresponding to the lattice constant of (100) direction. The selected area electron diffraction (SAED) (Fig. 1b inset) shows a 6fold symmetry, indicating that the synthesized InSe orientate along
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Fig. 1 Characterization of InSe sheet: (a) InSe crystal structure: top is side view of InSe lattice structure and down is top view of InSe crystal structure. (b) HRTEM images of few layer InSe. The inset is the corresponding SAED pattern. (c) The optical image of multilayer InSe nanosheets. (d) The corresponding Raman mapping of intensity of A1g peak. The wavelength and intensity of the laser used for Raman spectroscopy is 532 nm and 1 mW, respectively. Thin-film InSe in the thickness range of 10~50 nm are used in this study. Multilayer InSe FETs were fabricated on 300 nm SiO2/Si substrates using a shadow mask combined with metals thermal evaporation. Fig. 2a shows the 3D schematic of back-gated InSe FETs. An optical image of InSe FETs is shown in Fig. 2b, and the corresponding AFM image and AFM height profile are presented in Fig. S2 of supplementary information. The channel thickness is 33 nm (Fig. S2-b, supplementary information). The electrical characteristics of thin-film InSe back-gated FETs with Cr/Au contacts are measured under the ambient environment. The transfer curves obtained at a bias of Vds = 1 V (Fig. 2c ) exhibit a typical ntype channel behavior with turning on at positive gate biases, which indicates that the Fermi levels for Cr is close to the conduction band bottom of InSe, resulting in electron injection. A very small recovery of drain current at large negative Vg is shown in Fig. 2c due to the inversion channel condition. The band of multilayer InSe can be bent by the gate bias because of the nature of InSe with low density of
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Journal Name states. However, the Schottky barrier height is smaller for electron while larger for hole transport, leading to small hole currents and high electron currents. Fig.2d shows the corresponding output characteristics of thin-film InSe FETs with Cr/Au contacts. The current shows a linear increasing within low Vds range and a saturation condition during high Vds, which is well in agreement with the current saturation behavior of conventional long-channel ntype metal oxide semiconductor (NMOS) transistors. The saturation of current in InSe FETs is caused by the conducting channel converting to “pinch-off” condition applying enough high Vds. This saturation feature of current is an important factor for the practical applications in digital circuits in order to reach maximum possible operation speeds. Similar performance is observed in thin-film MoS2 FETs,22 which is absent in graphene FETs because of its zero bandgap structure. The mobility and on/off ratio are both critical parameters to evaluate the performance of a FET. The mobility of multilayer InSe FETs can be extracted from the linear region in Fig. 2c using the equation: µ = [L/(WCiVds)]×[dIds/dVg], where L is the channel length of 20 µm, W is the channel width of 20 µm, Ci is the capacitance of dielectric (Ci =ε0ε0/d), ε0 = 8.854×10-12 Fm-1 is the vacuum permittivity, ε0 is 3.9 for SiO2 and d (300 nm) is the thickness of SiO2. The calculated mobility value is 74 cm2V-1s-1 for Cr/InSe FET, which is higher that of MoS2 FETs based on 300 nm SiO2 substrate.5 The current on/off ratio is calculated by adopting ratio of maximum to minimum Ids from curves of Ids-Vg. The extracted on/off ratio value is 5×107 for Cr/InSe FET, which is higher than that of thin-film MoS2 FETs of 106 and comparable to single layer MoS2 top-gated FETs of 108.5, 22 The high current on/off ratio of thin-film InSe FETs meet with the requirements of practical application that the current on/off ratio must excess 104 for potential candidate materials replacing the silicon in CMOS digital logic devices.3
Fig. 2 (a) Schematic of back-gated thin-film InSe FETs consisting of a SiO2 back gate insulator (300 nm). (b) Optical image of fabricated
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ARTICLE DOI: 10.1039/C4CP04968C thin-film InSe FETs. (c) Transfer characteristics of back-gated 33 nm thin-film InSe back-gated FETs with Cr metal contacts for Vds = 1 V. (d) Corresponding output characteristics. Device configuration (length/width): Cr 20 µm/20 µm. All measured are performed at room temperature under ambient environment. (e) Transfer curves as function of the InSe thickness. (f) The extracted effective mobility as function of the InSe thickness. The performance of back-gated InSe FETs as a function of channel thickness ranging from 10 to 50 nm was investigated using Cr/Au as contact metal. Fig. 2e and Fig. S3 (supplementary information) exhibit the transfer curves and corresponding output curves of 10 nm, 15 nm, 21 nm and 33 nm multilayer InSe FETs, respectively. From Fig. 2e, we extract the mobility values for various thicknesses as shown in Fig. 2f. The mobilities show a nonmonotonic trend upon the thickness variance (Fig. 2f). The mobility rapidly increases from 2 cm2V-1s-1 to 74 cm2V-1s-1 as InSe thickness changing from 10 nm to 33 nm, then the value of mobility decreases to 37 cm2V-1s-1 with channel thickness increasing to 50 nm. A peak value of mobility occurs at 33 nm. Similar phenomena have been observed in the FETs of multilayer MoS2,18 graphene28 and black phosphorus.29 High performance thin-film InSe FETs can be achieved using the InSe thickness in the range of 30-40 nm. The thickness dependent mobilities of InSe nanosheets FETs can well be understood by a resistor network model (supplementary information, Fig. S4), which has been well used to explain the thickness related transport properties of the FETs based on multilayer graphene,28 MoS218 and black phosphorus29. To explore the impact of metal contacts on electrical performances of the devices, the simplest model is proposed that the barriers between thin-film InSe semiconductors and metals are given by the equation: Φb = Φ-χ, where Φ is the work function and χ is the semiconductor electron affinity.30 This simple model has successfully been applied in some nanoscale contacts such as the contact to carbon nanotubes.30 To achieve low contact resistance at interface of metals and thin-film InSe using above model, several metals with low work functions are chosen in our study including Al, Ti, Cr and In as shown in Fig. 3a. Electron injection can occur for all metals because the work functions of the selected metals are close to the conduction band. Fig. 3b presents the expected electronic characteristics of InSe transistors with different metal contacts, which are obtained on the base of such assumption that contact barrier height is determined by the work function of metal. Al has the smallest work function among the selected metal contacts, so InSe FETs with Al contacts are expected to have highest performance (Fig. 3b), and the performance of InSe FETs with different contacts are increased in the order of Cr, Ti, In and Al (Fig. 3b). To test such assumption by experiments, the thin-film InSe FETs with the same device configuration (channel thickness: ~30 nm, channel length: 20 µm, width: 20 µm) are fabricated on SiO2/Si (300 nm SiO2) using Cr, Ti, In and Al, respectively. The electrical measurements of devices are performed under the ambient environment. The experimental transfer (Ids-Vg) and output (Ids-Vds) characteristics of thin-film InSe FETs with different metal contacts are shown in Fig. 3c and Fig. 3d-f, respectively. The contact resistance can be roughly calculated by the linear region of the IdsVds curves at applying high Vg as described in early report.22 The contact resistance of the Al-InSe, Ti-InSe, Cr-InSe and In-InSe FETs are estimated to be 5.4×108 Ωµm-1, 3.4 × 104 Ωµm-1, 1.1 × 104 Ωµm1 and 1.9 × 103 Ωµm-1, respectively. The Al-InSe FETs show the
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highest contact resistance, which agrees with the electrical performance. The transconductance gm, defined as gm = dIds/dVg, is important trait to evaluate the performance of FETs. The gm values, which extracted from InSe devices with different metal contacts, are 0.09 µS for Al, 0.45 µS for Ti, 0.8 µS for Cr and 2.0 µS for In, respectively. Furthermore, the extracted field–effect mobilities are 4.7 cm2V-1s-1, 26.9 cm2V-1s-1, 74 cm2V-1s-1 and 162 cm2V-1s-1 for Al, Ti, Cr and In -contacted devices, respectively, which are agreement with the variety trends of gm values for different contacts. The higher gm and mobility values of Cr-InSe and In-InSe FETs can be attributed to the smaller contact resistance.21 The on/off ratio value is 107, 106, 107 and 108 for Al, Ti, Cr and In contacts as shown in Fig. S5, respectively. All on/off ratio values achieve the requirements of practical application in Complementary Metal Oxide Semiconductor (CMOS) digital logic devices. These experimental results are obviously conflicted with the expected device performance shown in Fig. 3a-3b. For example, the InSe FETs with Al contacts, which are expected to have highest performance, exhibit a lowest transconductance and mobility in experiments, which is contrary to the result concluded from work function alone. The observation of the low performance in the devices with Al contacts is attributed to the formation of high resistance Schottly contacts between Al-InSe.
Fig.3. (a) Band structure of contact metals, SiO2 and InSe. The Ec and Ev represent the conduction and valence band edges of InSe, respectively. (b) Schematic of expected devices performance based on work function alone. (c) Transfer characteristics of back-gated 33 nm thin-film InSe back-gated FETs with Al, Ti, Cr and In metal contacts for Vds = 1 V. Output characteristics of 33 nm thin-film InSe back-gated FETs for (d) Al, (e) Ti and (f) In metal contacts, respectively. Device configuration (length/width): Al is 24 µm/20 µm, Ti is 20 µm/20 µm and In is 20 µm/20 µm. The saturation current regime under high Vds is also observed in Al and Ti contacts devices as shown in Fig. 3d, 3e. However, the
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Journal Name DOI: 10.1039/C4CP04968C current through In contacts devices shows a slight saturation even at Vg = 20 V and Vds = 5 V, indicating higher ON current is possible. Though In-InSe FETs show the highest devices performance, absent current saturation is a fatal drawback for In as contact metal application in thin-film InSe FETs for the practical applications in digital circuits in order to reach maximum possible operation speeds. Choosing a suitable contact metals, high electrical conductivity is not the only factor, good chemical and thermal stability are also important. The poor chemical stability and low melting point of In also may hinder its application as contact metal. The electrical studies of devices indicate that contact resistance of metals/multilayer InSe is not controlled by the work function of the metals as the existing models of electrical contacts, which is possibly caused by the unusual interaction interface of metal/InSe. So the nature of InSe/metals contact interface, which is crucial for devices performance, is directly investigated by using Raman spectroscopy and AFM. Four contact metals of Al, Ti, Cr and In with an average thickness of 2 nm are deposited onto the surface of multilayer InSe by thermal evaporation, respectively. The Fig. 4a shows schematic of contact metals deposited on multilayer InSe. The Raman spectrums show no variance to the samples between InSe alone and metal film/InSe (shown in Fig. 4b), suggesting that the interfaces of the deposited metals and InSe are van der Waals epitaxial (physical contact) hetero-junctions rather than the alloys that easily formed in metal/Si contacts as expected.30, 32 This physical interaction at the interface of metal/ multilayer InSe is caused by the stable InSe surface without dangling bonds, and differs from the nature of metal alloys in traditional metal/semiconductors contacts.30 Furthermore, the surface morphologies of metal film deposited on multilayer InSe were characterized by AFM as shown in Fig. 4c-f. Indium on multilayer InSe has a smooth film morphology with rms roughness of 0.32 nm, while Cr films on InSe have a relatively rough structure with rms roughness of 0.45 nm. Ti and Al films on InSe have more rough morphology consisting of clusters with rms roughness of 0.50 nm and 0.58 nm, respectively. The roughness value presents smooth wetability of metals on InSe, and rough surface of metals film results in intimate regions and remote contacts with multilayer InSe, which degrade the electron transport across the interfaces of contact metals and InSe. The morphologies of metals film are closely related to the interaction between metal and InSe, and impact electronic properties of InSe devices.17, 31, 32 Actually, the qualities of the four metal films on multilayer InSe surface (roughness) are accorded well with the varying trends of the measured performance in InSe FETs with different metals. It is well studied that clustering of adsorbates on surface depends on the relative values of inter-adsorbate and adsorbate-substrate interactions. AFM results suggest that interaction of Al and InSe is the weakest among the four metals. The interaction of metals and multilayer InSe are van der Waals epitaxy hetero-junctions, which are consistent with the condition of single layer WSe2 FETs.16, 19 Liu etc. demonstrate that d-orbitals of the contact metals play a key role in forming low resistance ohmic contacts with monolayer WSe2 by experimental and theory calculation.16,19 The theoretical work indicates that contact resistance is controlled by metal work function and sufficient strength of orbital overlap metals between metals and TMDs. Metals with small work function are more likely to form zero or negative Schottly barrier with TMDs, which is important for good contact between metals and bulk semiconductors. Metals with d-orbitals lead to form small interlayer distance and a zero tunnel barrier at the interface.16, 19 This theory also can be applied to our multilayer InSe system. Compared to other three metals in our work, Al without d-orbital has the smallest overlap of electronic orbits with
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Journal Name InSe, resulting in the weakest interactions with InSe. The other three contact metals with d-orbits can have overlap with the orbitals of InSe, leading to stronger interactions. The stronger interactions can produce more intimate contacts with semiconductors, which are beneficial for electron injection and forming lower contact resistance. Multilayer InSe FETs with In contact show the best performance, due to In own low work function and more d-orbitals (4d10) compared to Ti (3d2) and Cr (3d5) with higher work function and fewer d-orbitals. This behavior is consistent with the facts that electrical properties of InSe FETs are controlled by contact metals. All these results provide a general rule for designing low resistance contacts for high performance FETs based on multilayer InSe layered semiconductors.
ARTICLE DOI: 10.1039/C4CP04968C Ti, Cr and In. Most of the devices show a current saturation region at high drain-source voltage except In-InSe FETs. The thickness dependent mobilities show a nonmonotonic trend. Multilayer InSe FETs with In contact achieve a high electron mobility of 162 cm2V-1s-1with high current on/off ratio of 108. The direct characterization of the physical nature of the interaction between metals and multilayer InSe was performed using Raman spectroscopy and AFM. The device performance and the interface morphology of deposition metals/InSe indicate that low resistance in metals-InSe interface strongly depends on the physical states of contact metals and InSe. Our results provide a general guidelines and rules to design low resistance contact for high performance FETs based on thinfilm layered semiconductors.
Acknowledgements This work is supported by the National Natural Science Foundation of China (NSFC, No.61172001, 21373068, 21303030), the National key Basic Research Program of China (973 Program) under Grant No. 2013CB632900. WQT thanks financial support from the State Key Lab of Urban Water Resource and Environment (HIT) (2014TS01) and the Open Project of State Key Laboratory of Supramolecular Structure and Materials (JLU) (SKLSSM201404).)
Notes and references a
Academy of Fundamental and Interdisciplinary Science, Harbin Institute of Technology, Harbin, 150080, People's Republic of China. b School of Materials Science and Engineering, Harbin Institute of Technology, Harbin, 150080, China. Electronic Supplementary Information (ESI) available: The Raman spectrums, AFM of device, output curves as function of the InSe thickness, resistor network model of multilayer InSe FETs, logic transfer of multilayer InSe FETs with various metal contacts. See DOI: 10.1039/b000000x/
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5 Fig. 4 Direct characterization of interaction between InSe/Metals: (a) Schematic of contact metals deposited on multilayer InSe. (b) Raman spectrums of 2 nm contact metals deposited on multilayer InSe. The rms values of roughness for contact metals and AFM image of 2 nm (c) Al, (d) Ti, (e) Cr and (f) In on multilayer InSe.
4. Conclusions In summary, we have performed systematic experimental studies for understanding the interface nature of metal/ multilayer InSe, which is crucial to design a proper metal contact for high performance of thin-film InSe FETs. The FETs with metal contacts of Al, Ti, Cr and In as were measured. All these FETs show n-channel transistor behaviors with significantly increased mobilities in the contact sequence of Al,
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The table of contents entry Solid experimental investigations were performed to reveal the particular interface nature of thin-film indium selenide (InSe) layered semiconductor/metals. Multilayer InSe transistors show significantly increased mobilities in the contact sequence of aluminum, titanium, chromium and indium. Interface nature of metal/thin-film InSe layered semiconductor is strong van der Waals epitaxial interaction companying with d-orbital overlap. Title: Performance improvement of transistors with optimized metal contacts
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multilayer
InSe
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