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Inhomogeneity in barrier height at graphene/Si (GaAs) Schottky junctions
This content has been downloaded from IOPscience. Please scroll down to see the full text. 2015 Nanotechnology 26 215702 (http://iopscience.iop.org/0957-4484/26/21/215702) View the table of contents for this issue, or go to the journal homepage for more
Download details: IP Address: 134.129.120.3 This content was downloaded on 01/07/2015 at 18:13
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Nanotechnology Nanotechnology 26 (2015) 215702 (7pp)
doi:10.1088/0957-4484/26/21/215702
Inhomogeneity in barrier height at graphene/ Si (GaAs) Schottky junctions D Tomer1, S Rajput1, L J Hudy1, C H Li2 and L Li1 1 2
Department of Physics, University of Wisconsin, Milwaukee, WI 53211, USA Naval Research Laboratory, Washington, DC 20375, USA
E-mail: [email protected] Received 18 November 2014, revised 25 March 2015 Accepted for publication 27 March 2015 Published 1 May 2015 Abstract
Graphene (Gr) interfaced with a semiconductor forms a Schottky junction with rectifying properties, however, fluctuations in the Schottky barrier height are often observed. In this work, Schottky junctions are fabricated by transferring chemical vapor deposited monolayer Gr onto ntype Si and GaAs substrates. Temperature dependence of the barrier height and ideality factor are obtained by current–voltage measurements between 215 and 350 K. An increase in the zero bias barrier height and decrease in the ideality factor are observed with increasing temperature for both junctions. Such behavior is attributed to barrier inhomogeneities that arise from interfacial disorders as revealed by scanning tunneling microscopy/spectroscopy. Assuming a Gaussian distribution of the barrier heights, mean values of 1.14 ± 0.14 eV and 0.76 ± 0.10 eV are found for Gr/Si and Gr/GaAs junctions, respectively. These findings resolve the origin of barrier height inhomogeneities in these Schottky junctions. Keywords: graphene, Schottky barrier, STM (Some figures may appear in colour only in the online journal) has been confirmed by recent scanning tunneling microscopy/ spectroscopy (STM/STS) [24] and temperature dependent I–V measurements [6]. For Gr/n-Si Schottky junctions, Gr ripples and grain boundaries have also been suggested as the cause of temperature dependent SBH [26]. However, direct correlation of spatial inhomogeneities in Gr on carrier transport across the Gr/Si Schottky junctions has not been fully addressed. In this work, we first determine the atomic scale electronic inhomogeneities and the formation of charge puddles at monolayer Gr/Si and Gr/GaAs junctions using STM/STS. We then investigate SBH and ideality factor by temperature dependent I–V measurements between 215 and 350 K. We find non-ideal behavior such as increase in zero bias SBH and decrease in ideality factor with increasing temperature, which strongly suggests spatial fluctuations in SBH. Following the modified TE theory with a Gaussian distribution of the SBHs [6, 26, 27], we find mean barriers of 1.14 and 0.76 eV for Gr/ Si and Gr/GaAs junctions with standard deviations of 0.14 and 0.10 eV, respectively. The Schottky junctions were fabricated by transferring chemical vapor deposited (CVD) Gr onto n-type Si(111) and GaAs(100) with carrier densities Nd ∼ 1017 cm−3 and
Graphene (Gr), a semimetal with linear energy dispersion [1], forms a Schottky junction when interfaced with a semiconductor [2–11], offering the unique advantage of a tunable Fermi level [12–14], and thus Schottky barrier height (SBH) [14, 15]. These junctions enable novel applications in solar cells [16], photo detectors [17], three terminal transistors with up to 106 on/off ratio [14, 18], and tunable reverse biased sensors [19]. As such, extensive investigations have focused on carrier transport across these Schottky junctions, which has been found to generally follow the thermionic emission (TE) theory that inherently assumes a perfect homogeneous junction interface [20]. Characteristic junction parameters such as SBH and ideality factor, however, show large variations and strong temperature dependence. For example, SBH between 0.25 and 0.92 eV has been observed for Gr/Si Schottky junction [2, 9–11]. These variations could be caused by either extrinsic effects such as the number of Gr layers in the junction [21], or intrinsic spatial inhomogeneity due to substrate steps [22] and Gr ripples and ridges [23, 24], or the formation of electron–hole puddles in graphene [25]. For polar semiconductors such as hexagonal SiC, the direct impact of Gr ripples on the SBH of Gr/SiC Schottky junctions 0957-4484/15/215702+07$33.00
1
© 2015 IOP Publishing Ltd Printed in the UK
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 1. (a) STM image of CVD graphene transferred onto n-Si substrate (It = 0.1 nA, Vs = −0.65 V). (b) Atomic resolution STM image of graphene ripples (It = 0.1 nA, Vs = −0.3 V). (c) Spatially resolved dI/dV spectra taken at locations marked in (b).
∼1016 cm−3, respectively. The substrates were first cleaned with organic solvents followed by RCA procedure. To terminate the surfaces with hydrogen [28] and sulfur [29], the as-cleaned Si and GaAs wafers were dipped in 49% HF+40% NH4F (1:7) and NH4S (40%) solutions, respectively. The top electrode was fabricated using standard photolithography technique, by first depositing 100 nm SiO2 on the H- and Sterminated Si and GaAs, with a square window of 0.9 × 0.9 mm2. Then Cr/Au (10/150 nm) top contacts were deposited on the SiO2 by electron beam evaporation. To form Ohmic back contact to GaAs, multilayer Au/Ni/AuGe (100/ 20/50 nm) was deposited by electron beam evaporation at room temperature, followed by annealing at ∼400 °C in forming gas. Ohmic back contact to Si was made using conductive silver paste. Next, the Si and GaAs substrates with prepatterned electrodes were quickly (10 s) dipped into NH4F and NH4S solutions, respectively, right before monolayer CVD Gr (Graphene Platform) were transferred using standard PMMA-based method [30]. Finally, these samples were annealed in an Ar atmosphere at ∼300 °C to help remove any polymeric residues [24]. STM/STS was carried out at liquid nitrogen temperature. The dI/dV tunneling spectra were acquired using lock-in detection by turning off the feedback loop and applying an ac modulation of 9 mV (rms) at 860 Hz to the bias voltage. Temperature dependent I–V measurements were carried out between 215 and 350 K. The surface morphology of transferred Gr is first characterized by STM. Figure 1(a) shows an image of Gr/Si substrate after annealing at ∼300 °C in ultrahigh vacuum for
30 min. Clearly evident is a non-uniform surface with vertical undulations of ∼0.5 nm over length scales of tens of nanometers (marked by a circle), likely due to roughness of the underlying Si substrate. Figure 1(b) is a close-up view showing the characteristic Gr honeycomb lattice that is continuous over these fluctuations. These features are similar to earlier STM studies of Gr ripples [6, 23, 24, 31, 32], which are attributed to either Gr in contact with the underlying substrate (dark regions), or buckled up from it (bright regions). The electronic properties of the Gr are further investigated by tunneling spectroscopy. Figure 1(c) shows spatially resolved dI/dV spectra taken across a ripple at locations marked in figure 1(b) for Gr/Si. All spectra exhibit two characteristic minima, one at zero bias (EF) caused by phonon-assisted inelastic tunneling [33], and the other at negative bias marked by downward arrows attributed to the Dirac point (ED), indicating n-type doping [34]. Moving from bright to dark to bright regions (figure 1(c)), while ED varies between 105 and 130 meV, no direct correlation is found to the topographic fluctuations, in contrast to the case of Gr transferred on SiC substrates [6, 24]. In addition, atop the brightest regions (spectra 1–3 and 7, 8) peaks also appear, as marked by upward arrows, possibly due to impurity states arising from disorders such as polymer and Cu residues [35], or partial hydrogen termination of the Si substrate. Similar features are observed for Gr/GaAs as shown in figure 2(a). Large scale corrugations of ∼1 nm in height and hundreds of nm in width are likely originated from substrate 2
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 2. (a) STM image of CVD graphene transferred onto n-GaAs substrate (It = 0.1 nA, Vs = −0.3 V). (b) Atomic resolution STM image of graphene ripples (It = 0.2 nA, Vs = −0.3 V). (c) Spatially resolved dI/dV spectra taken at locations marked in (b).
roughness. At the atomic scale, ripples ∼0.35 nm in height are also seen (figure 2(b)). A series of dI/dV spectra, taken at positions 1–11 marked in figure 2(b), are shown in figure 2(c). While all spectra exhibit the similar phononassisted inelastic tunneling minimum at EF [33], the Dirac point (marked by downward arrows) is now above EF, indicative of p-type doping. Similarly, fluctuations in ED between 110 and 160 meV are also observed, but no direct correlation is found to the undulation of the ripples. Likely substrate disorder induced states peaked at ∼0.24 eV are again observed at some locations (spectra 1–3, 5). The local fluctuations in the Dirac point lead to variation in carrier concentration (Δn(p)) that can be calculated by Δn (p) =
4π (ΔED )2 (hv f )2
inherent spatial inhomogeneity in Gr leads to fluctuations in the SBHs determined by the temperature dependent I–V measurements. Both Gr/Si and Gr/GaAs junctions exhibit rectifying I–V between 215 and 350 K, as shown in figures 3(a) and (b), respectively, suggesting the formation of Schottky diodes. The thermally excited transport across the junction can be understood following the standard TE model [20] ⎡ ⎤ ⎛ qV ⎞ I (T , V ) = IS (T ) ⎢ exp ⎜ ⎟ − 1⎥ , ⎝ ηkT ⎠ ⎣ ⎦
(1)
where V is the applied voltage, q the electron charge, k the Boltzmann’s constant, and η the ideality factor. The saturation current, Is(T), can be expressed as [20]
, where vf is the Fermi velocity of Gr (∼c/
⎡ − qϕ b0 ⎤ IS (T ) = AA*T 2 exp ⎢ ⎥, ⎣ kT ⎦
300, where c is the speed of light) and h the Plank’s constant. and This yields variations of 3.79 × 1010 cm−2 11 −2 1.57 × 10 cm in electron and hole concentrations for Gr/Si and Gr/GaAs junctions, respectively. These observations clearly indicate that Gr is prone to ripple formation when interfaced with Si and GaAs substrates, similar to CVD Gr transferred on hydrogen-terminated SiC substrates [6, 24] and exfoliated Gr on SiO2 [23, 31, 32]. Interestingly, unlike the Gr/SiC junctions, the spatial variations in ED for both Gr/Si and Gr/GaAs junctions do not follow the topographic fluctuations [6, 24]. The local charge fluctuations nevertheless results in electron and hole puddles, similar to that of Gr/SiO2 [31, 32]. As discussed below, this
(2)
where A is the diode area, A* the effective Richardson constant of the semiconductor, and ϕb0 the zero bias SBH, which can be obtained from the extrapolation of Is(T) in the semi-log forward bias ln(I)–V ϕ b 0 (T ) =
kT ⎛ AA*T 2 ⎞ ln ⎜ ⎟. q ⎝ IS ⎠
(3)
The ideality factor, η, is a dimensionless parameter that accounts for any deviation from the standard TE theory (η = 1 for an ideal junction), and can be calculated from the slope of 3
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 3. (a) Temperature dependent I–V curves of Gr/Si Schottky junction between 215 and 350 K (inset: schematic diagram of the cross section of the device). (b) Temperature dependent I–V curves of Gr/GaAs Schottky junction between 215 and 350 K (inset: close-up view of forward bias current). (c),(d) Temperature dependent semi-logarithmic forward bias I–V curves of Gr/Si and Gr/GaAs Schottky junctions, respectively.
changes from 0.48 to 0.62 eV and η varies from 1.88 to 1.44. This temperature dependence clearly deviates from the simple TE theory, suggesting barrier inhomogeneities [39–41]. This is further supported by the analysis of the Richardson plot, ln(IS/T2) versus 1000/T (figure 4(b)). The deviation from linearity below 275 K indicates temperature dependent barrier height for both junctions. Linear fitting of the data above ∼275 K (dashed line) yields SBH of 0.47 and 0.36 eV, and A* of 1.04 × 101 and 8.72 × 10−1 A m−2 K−2 for Si and GaAs, respectively. The large deviation of A* from the known experimental values of 1.12 × 106 A m−2 K−2 for Si [9, 29] and 0.41 × 104 A m−2 K−2 for GaAs [30] clearly indicates inhomogeneous SBHs due to potential fluctuations at the interface [42]. Assuming a Gaussian distribution of the barrier height, the deviation from ideal TE theory can be explained by the Werner model [43] that correlates the mean (ϕbm) and
the linear region of the forward ln(I)–V η=
q ⎛ dV ⎞ ⎜ ⎟. kT ⎝ d(ln I ) ⎠
(4)
Temperature dependent forward bias ln(I)–V plots of Gr/ Si and Gr/GaAs junctions are shown in figures 3(c) and (d), respectively. At low bias voltage, both are linear over ∼3–4 orders of magnitude in current, and the deviation from linearity is likely due to large series resistance [36] in both types of junctions. Figure 4(a) shows the temperature dependence of the zero bias SBH ϕb0 and ideality factor η, calculated using equations (3) and (4) with a total diode area of 1.62 mm2 (= 2 × 0.9 × 0.9 mm2) and Richardson constant A* of 1.12 × 106 and 0.41 × 104 A m−2 K−2 for n-Si [21, 37] and n-GaAs [38], respectively. For Gr/Si, ϕb0 increases from 0.66 to 0.82 eV and η decreases from 2.62 to 1.66 from 215 to 350 K. A similar trend is also seen for Gr/GaAs, where ϕb0
4
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Nanotechnology 26 (2015) 215702
Figure 4. (a) Zero bias barrier height (ϕb0) and ideality factor (η) as a function of temperature for Gr/Si and Gr/GaAs Schottky junctions. (b) Richardson plot, ln(Is/T2) versus 1000/T for both junctions.
Figure 5. (a) Apparent zero-bias barrier height ϕap as a function of q/2kT for Gr/Si and Gr/GaAs junctions. (b) Modified Richardson plot, ln
(Is/T2)-q2σ2s /2k2T2 versus 1000/T for both junctions.
The modified Richardson plot, [ln(Is/T2)-q2σ2s /2k2T2] versus 1000/T, is shown in figure 5(b). Since
apparent (ϕap) barrier height as follows ϕap (T ) = ϕbm −
qσs2 , 2kT
qϕbm ⎡ Is ⎤ ⎡ q 2σ 2 ⎤ ln ⎢ 2 ⎥ − ⎢ 2 s 2 ⎥ = ln(AA*) − , ⎣ T ⎦ ⎣ 2k T ⎦ kT
(5)
where ϕap(T) is the same as the experimentally measured ϕb0(T) and σs is the standard deviation. The ϕap(T) is plotted as a function of q/2kT in figure 5(a), yielding a mean barrier height of 1.14 eV and σs = 141 mV for Gr/Si, and 0.76 eV and σs = 98 mV for Gr/GaAs. The value for Gr/Si is good agreement with earlier studies [27].
(6)
this plot should be a straight line with the the mean barrier height (ϕbm) determined by slope and y-intercept [ln(AA*)] that would directly yield A*. The mean barrier height is found to be 1.15 eV for Gr/Si and 0.74 eV for Gr/GaAs, with corresponding Richardson constants of 1.14 × 106 and 5
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Nanotechnology 26 (2015) 215702
0.27 × 104 A m−2 K−2, respectively, in much better agreement with previously defined values. Alternately, the barrier inhomogeneities can be considered by calculating the flat band barrier height ϕbf,, an intrinsic parameter given by [44] ϕbf = ηϕb0 − (η − 1) ζ ,
(7)
where ζ = (kT/q)ln(Nc/Nd), and Nc = 2(2πm*kT/h2)3/2 is the effective density of states, and Nd the donor concentration. Figures 6(a) and (b) show ϕbf as a function of temperature, where the dashed line is a linear fit with ϕbf (T ) = ϕbf (0) + αT ,
(8)
where ϕbf(0) is the zero-temperature flat band barrier height and α the temperature coefficient. This yields a ϕbf(0) of 1.54 and 0.86 eV with α = 6.48 × 10−4 and 1.09 × 10−4 eV K−1 for Gr/Si and Gr/GaAs, respectively. Clearly, the flat band barrier heights (ϕbf) are not only always greater than the zero bias values (ϕb0), but are also with a weak temperature dependence. In addition, equation (7) also correlates the measured zero bias SBH ϕb0 and ideality factor η. For homogeneous junction, η = 1, thus ϕbf = ϕb0. For inhomogeneous junctions, η is always greater than one. In the current case, since the magnitude of ϕb0 is more than 10x greater than ζ for Gr/Si and ∼5x greater for Gr/GaAs junctions, the term ηϕb0 is much larger than ζ(η-1), hence ϕb0 ∼ ϕbf/η. This leads to two observations. First, the flat band barrier height ϕbf is always greater than the zero bias value ϕb0 since η is greater than one, consistent with experimental data. Second, in the limits when η is small (or large), e.g.,
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Inhomogeneity in barrier height at graphene/Si (GaAs) Schottky junctions
This content has been downloaded from IOPscience. Please scroll down to see the full text. 2015 Nanotechnology 26 215702 (http://iopscience.iop.org/0957-4484/26/21/215702) View the table of contents for this issue, or go to the journal homepage for more
Download details: IP Address: 134.129.120.3 This content was downloaded on 01/07/2015 at 18:13
Please note that terms and conditions apply.
Nanotechnology Nanotechnology 26 (2015) 215702 (7pp)
doi:10.1088/0957-4484/26/21/215702
Inhomogeneity in barrier height at graphene/ Si (GaAs) Schottky junctions D Tomer1, S Rajput1, L J Hudy1, C H Li2 and L Li1 1 2
Department of Physics, University of Wisconsin, Milwaukee, WI 53211, USA Naval Research Laboratory, Washington, DC 20375, USA
E-mail: [email protected] Received 18 November 2014, revised 25 March 2015 Accepted for publication 27 March 2015 Published 1 May 2015 Abstract
Graphene (Gr) interfaced with a semiconductor forms a Schottky junction with rectifying properties, however, fluctuations in the Schottky barrier height are often observed. In this work, Schottky junctions are fabricated by transferring chemical vapor deposited monolayer Gr onto ntype Si and GaAs substrates. Temperature dependence of the barrier height and ideality factor are obtained by current–voltage measurements between 215 and 350 K. An increase in the zero bias barrier height and decrease in the ideality factor are observed with increasing temperature for both junctions. Such behavior is attributed to barrier inhomogeneities that arise from interfacial disorders as revealed by scanning tunneling microscopy/spectroscopy. Assuming a Gaussian distribution of the barrier heights, mean values of 1.14 ± 0.14 eV and 0.76 ± 0.10 eV are found for Gr/Si and Gr/GaAs junctions, respectively. These findings resolve the origin of barrier height inhomogeneities in these Schottky junctions. Keywords: graphene, Schottky barrier, STM (Some figures may appear in colour only in the online journal) has been confirmed by recent scanning tunneling microscopy/ spectroscopy (STM/STS) [24] and temperature dependent I–V measurements [6]. For Gr/n-Si Schottky junctions, Gr ripples and grain boundaries have also been suggested as the cause of temperature dependent SBH [26]. However, direct correlation of spatial inhomogeneities in Gr on carrier transport across the Gr/Si Schottky junctions has not been fully addressed. In this work, we first determine the atomic scale electronic inhomogeneities and the formation of charge puddles at monolayer Gr/Si and Gr/GaAs junctions using STM/STS. We then investigate SBH and ideality factor by temperature dependent I–V measurements between 215 and 350 K. We find non-ideal behavior such as increase in zero bias SBH and decrease in ideality factor with increasing temperature, which strongly suggests spatial fluctuations in SBH. Following the modified TE theory with a Gaussian distribution of the SBHs [6, 26, 27], we find mean barriers of 1.14 and 0.76 eV for Gr/ Si and Gr/GaAs junctions with standard deviations of 0.14 and 0.10 eV, respectively. The Schottky junctions were fabricated by transferring chemical vapor deposited (CVD) Gr onto n-type Si(111) and GaAs(100) with carrier densities Nd ∼ 1017 cm−3 and
Graphene (Gr), a semimetal with linear energy dispersion [1], forms a Schottky junction when interfaced with a semiconductor [2–11], offering the unique advantage of a tunable Fermi level [12–14], and thus Schottky barrier height (SBH) [14, 15]. These junctions enable novel applications in solar cells [16], photo detectors [17], three terminal transistors with up to 106 on/off ratio [14, 18], and tunable reverse biased sensors [19]. As such, extensive investigations have focused on carrier transport across these Schottky junctions, which has been found to generally follow the thermionic emission (TE) theory that inherently assumes a perfect homogeneous junction interface [20]. Characteristic junction parameters such as SBH and ideality factor, however, show large variations and strong temperature dependence. For example, SBH between 0.25 and 0.92 eV has been observed for Gr/Si Schottky junction [2, 9–11]. These variations could be caused by either extrinsic effects such as the number of Gr layers in the junction [21], or intrinsic spatial inhomogeneity due to substrate steps [22] and Gr ripples and ridges [23, 24], or the formation of electron–hole puddles in graphene [25]. For polar semiconductors such as hexagonal SiC, the direct impact of Gr ripples on the SBH of Gr/SiC Schottky junctions 0957-4484/15/215702+07$33.00
1
© 2015 IOP Publishing Ltd Printed in the UK
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 1. (a) STM image of CVD graphene transferred onto n-Si substrate (It = 0.1 nA, Vs = −0.65 V). (b) Atomic resolution STM image of graphene ripples (It = 0.1 nA, Vs = −0.3 V). (c) Spatially resolved dI/dV spectra taken at locations marked in (b).
∼1016 cm−3, respectively. The substrates were first cleaned with organic solvents followed by RCA procedure. To terminate the surfaces with hydrogen [28] and sulfur [29], the as-cleaned Si and GaAs wafers were dipped in 49% HF+40% NH4F (1:7) and NH4S (40%) solutions, respectively. The top electrode was fabricated using standard photolithography technique, by first depositing 100 nm SiO2 on the H- and Sterminated Si and GaAs, with a square window of 0.9 × 0.9 mm2. Then Cr/Au (10/150 nm) top contacts were deposited on the SiO2 by electron beam evaporation. To form Ohmic back contact to GaAs, multilayer Au/Ni/AuGe (100/ 20/50 nm) was deposited by electron beam evaporation at room temperature, followed by annealing at ∼400 °C in forming gas. Ohmic back contact to Si was made using conductive silver paste. Next, the Si and GaAs substrates with prepatterned electrodes were quickly (10 s) dipped into NH4F and NH4S solutions, respectively, right before monolayer CVD Gr (Graphene Platform) were transferred using standard PMMA-based method [30]. Finally, these samples were annealed in an Ar atmosphere at ∼300 °C to help remove any polymeric residues [24]. STM/STS was carried out at liquid nitrogen temperature. The dI/dV tunneling spectra were acquired using lock-in detection by turning off the feedback loop and applying an ac modulation of 9 mV (rms) at 860 Hz to the bias voltage. Temperature dependent I–V measurements were carried out between 215 and 350 K. The surface morphology of transferred Gr is first characterized by STM. Figure 1(a) shows an image of Gr/Si substrate after annealing at ∼300 °C in ultrahigh vacuum for
30 min. Clearly evident is a non-uniform surface with vertical undulations of ∼0.5 nm over length scales of tens of nanometers (marked by a circle), likely due to roughness of the underlying Si substrate. Figure 1(b) is a close-up view showing the characteristic Gr honeycomb lattice that is continuous over these fluctuations. These features are similar to earlier STM studies of Gr ripples [6, 23, 24, 31, 32], which are attributed to either Gr in contact with the underlying substrate (dark regions), or buckled up from it (bright regions). The electronic properties of the Gr are further investigated by tunneling spectroscopy. Figure 1(c) shows spatially resolved dI/dV spectra taken across a ripple at locations marked in figure 1(b) for Gr/Si. All spectra exhibit two characteristic minima, one at zero bias (EF) caused by phonon-assisted inelastic tunneling [33], and the other at negative bias marked by downward arrows attributed to the Dirac point (ED), indicating n-type doping [34]. Moving from bright to dark to bright regions (figure 1(c)), while ED varies between 105 and 130 meV, no direct correlation is found to the topographic fluctuations, in contrast to the case of Gr transferred on SiC substrates [6, 24]. In addition, atop the brightest regions (spectra 1–3 and 7, 8) peaks also appear, as marked by upward arrows, possibly due to impurity states arising from disorders such as polymer and Cu residues [35], or partial hydrogen termination of the Si substrate. Similar features are observed for Gr/GaAs as shown in figure 2(a). Large scale corrugations of ∼1 nm in height and hundreds of nm in width are likely originated from substrate 2
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 2. (a) STM image of CVD graphene transferred onto n-GaAs substrate (It = 0.1 nA, Vs = −0.3 V). (b) Atomic resolution STM image of graphene ripples (It = 0.2 nA, Vs = −0.3 V). (c) Spatially resolved dI/dV spectra taken at locations marked in (b).
roughness. At the atomic scale, ripples ∼0.35 nm in height are also seen (figure 2(b)). A series of dI/dV spectra, taken at positions 1–11 marked in figure 2(b), are shown in figure 2(c). While all spectra exhibit the similar phononassisted inelastic tunneling minimum at EF [33], the Dirac point (marked by downward arrows) is now above EF, indicative of p-type doping. Similarly, fluctuations in ED between 110 and 160 meV are also observed, but no direct correlation is found to the undulation of the ripples. Likely substrate disorder induced states peaked at ∼0.24 eV are again observed at some locations (spectra 1–3, 5). The local fluctuations in the Dirac point lead to variation in carrier concentration (Δn(p)) that can be calculated by Δn (p) =
4π (ΔED )2 (hv f )2
inherent spatial inhomogeneity in Gr leads to fluctuations in the SBHs determined by the temperature dependent I–V measurements. Both Gr/Si and Gr/GaAs junctions exhibit rectifying I–V between 215 and 350 K, as shown in figures 3(a) and (b), respectively, suggesting the formation of Schottky diodes. The thermally excited transport across the junction can be understood following the standard TE model [20] ⎡ ⎤ ⎛ qV ⎞ I (T , V ) = IS (T ) ⎢ exp ⎜ ⎟ − 1⎥ , ⎝ ηkT ⎠ ⎣ ⎦
(1)
where V is the applied voltage, q the electron charge, k the Boltzmann’s constant, and η the ideality factor. The saturation current, Is(T), can be expressed as [20]
, where vf is the Fermi velocity of Gr (∼c/
⎡ − qϕ b0 ⎤ IS (T ) = AA*T 2 exp ⎢ ⎥, ⎣ kT ⎦
300, where c is the speed of light) and h the Plank’s constant. and This yields variations of 3.79 × 1010 cm−2 11 −2 1.57 × 10 cm in electron and hole concentrations for Gr/Si and Gr/GaAs junctions, respectively. These observations clearly indicate that Gr is prone to ripple formation when interfaced with Si and GaAs substrates, similar to CVD Gr transferred on hydrogen-terminated SiC substrates [6, 24] and exfoliated Gr on SiO2 [23, 31, 32]. Interestingly, unlike the Gr/SiC junctions, the spatial variations in ED for both Gr/Si and Gr/GaAs junctions do not follow the topographic fluctuations [6, 24]. The local charge fluctuations nevertheless results in electron and hole puddles, similar to that of Gr/SiO2 [31, 32]. As discussed below, this
(2)
where A is the diode area, A* the effective Richardson constant of the semiconductor, and ϕb0 the zero bias SBH, which can be obtained from the extrapolation of Is(T) in the semi-log forward bias ln(I)–V ϕ b 0 (T ) =
kT ⎛ AA*T 2 ⎞ ln ⎜ ⎟. q ⎝ IS ⎠
(3)
The ideality factor, η, is a dimensionless parameter that accounts for any deviation from the standard TE theory (η = 1 for an ideal junction), and can be calculated from the slope of 3
D Tomer et al
Nanotechnology 26 (2015) 215702
Figure 3. (a) Temperature dependent I–V curves of Gr/Si Schottky junction between 215 and 350 K (inset: schematic diagram of the cross section of the device). (b) Temperature dependent I–V curves of Gr/GaAs Schottky junction between 215 and 350 K (inset: close-up view of forward bias current). (c),(d) Temperature dependent semi-logarithmic forward bias I–V curves of Gr/Si and Gr/GaAs Schottky junctions, respectively.
changes from 0.48 to 0.62 eV and η varies from 1.88 to 1.44. This temperature dependence clearly deviates from the simple TE theory, suggesting barrier inhomogeneities [39–41]. This is further supported by the analysis of the Richardson plot, ln(IS/T2) versus 1000/T (figure 4(b)). The deviation from linearity below 275 K indicates temperature dependent barrier height for both junctions. Linear fitting of the data above ∼275 K (dashed line) yields SBH of 0.47 and 0.36 eV, and A* of 1.04 × 101 and 8.72 × 10−1 A m−2 K−2 for Si and GaAs, respectively. The large deviation of A* from the known experimental values of 1.12 × 106 A m−2 K−2 for Si [9, 29] and 0.41 × 104 A m−2 K−2 for GaAs [30] clearly indicates inhomogeneous SBHs due to potential fluctuations at the interface [42]. Assuming a Gaussian distribution of the barrier height, the deviation from ideal TE theory can be explained by the Werner model [43] that correlates the mean (ϕbm) and
the linear region of the forward ln(I)–V η=
q ⎛ dV ⎞ ⎜ ⎟. kT ⎝ d(ln I ) ⎠
(4)
Temperature dependent forward bias ln(I)–V plots of Gr/ Si and Gr/GaAs junctions are shown in figures 3(c) and (d), respectively. At low bias voltage, both are linear over ∼3–4 orders of magnitude in current, and the deviation from linearity is likely due to large series resistance [36] in both types of junctions. Figure 4(a) shows the temperature dependence of the zero bias SBH ϕb0 and ideality factor η, calculated using equations (3) and (4) with a total diode area of 1.62 mm2 (= 2 × 0.9 × 0.9 mm2) and Richardson constant A* of 1.12 × 106 and 0.41 × 104 A m−2 K−2 for n-Si [21, 37] and n-GaAs [38], respectively. For Gr/Si, ϕb0 increases from 0.66 to 0.82 eV and η decreases from 2.62 to 1.66 from 215 to 350 K. A similar trend is also seen for Gr/GaAs, where ϕb0
4
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Nanotechnology 26 (2015) 215702
Figure 4. (a) Zero bias barrier height (ϕb0) and ideality factor (η) as a function of temperature for Gr/Si and Gr/GaAs Schottky junctions. (b) Richardson plot, ln(Is/T2) versus 1000/T for both junctions.
Figure 5. (a) Apparent zero-bias barrier height ϕap as a function of q/2kT for Gr/Si and Gr/GaAs junctions. (b) Modified Richardson plot, ln
(Is/T2)-q2σ2s /2k2T2 versus 1000/T for both junctions.
The modified Richardson plot, [ln(Is/T2)-q2σ2s /2k2T2] versus 1000/T, is shown in figure 5(b). Since
apparent (ϕap) barrier height as follows ϕap (T ) = ϕbm −
qσs2 , 2kT
qϕbm ⎡ Is ⎤ ⎡ q 2σ 2 ⎤ ln ⎢ 2 ⎥ − ⎢ 2 s 2 ⎥ = ln(AA*) − , ⎣ T ⎦ ⎣ 2k T ⎦ kT
(5)
where ϕap(T) is the same as the experimentally measured ϕb0(T) and σs is the standard deviation. The ϕap(T) is plotted as a function of q/2kT in figure 5(a), yielding a mean barrier height of 1.14 eV and σs = 141 mV for Gr/Si, and 0.76 eV and σs = 98 mV for Gr/GaAs. The value for Gr/Si is good agreement with earlier studies [27].
(6)
this plot should be a straight line with the the mean barrier height (ϕbm) determined by slope and y-intercept [ln(AA*)] that would directly yield A*. The mean barrier height is found to be 1.15 eV for Gr/Si and 0.74 eV for Gr/GaAs, with corresponding Richardson constants of 1.14 × 106 and 5
D Tomer et al
Nanotechnology 26 (2015) 215702
0.27 × 104 A m−2 K−2, respectively, in much better agreement with previously defined values. Alternately, the barrier inhomogeneities can be considered by calculating the flat band barrier height ϕbf,, an intrinsic parameter given by [44] ϕbf = ηϕb0 − (η − 1) ζ ,
(7)
where ζ = (kT/q)ln(Nc/Nd), and Nc = 2(2πm*kT/h2)3/2 is the effective density of states, and Nd the donor concentration. Figures 6(a) and (b) show ϕbf as a function of temperature, where the dashed line is a linear fit with ϕbf (T ) = ϕbf (0) + αT ,
(8)
where ϕbf(0) is the zero-temperature flat band barrier height and α the temperature coefficient. This yields a ϕbf(0) of 1.54 and 0.86 eV with α = 6.48 × 10−4 and 1.09 × 10−4 eV K−1 for Gr/Si and Gr/GaAs, respectively. Clearly, the flat band barrier heights (ϕbf) are not only always greater than the zero bias values (ϕb0), but are also with a weak temperature dependence. In addition, equation (7) also correlates the measured zero bias SBH ϕb0 and ideality factor η. For homogeneous junction, η = 1, thus ϕbf = ϕb0. For inhomogeneous junctions, η is always greater than one. In the current case, since the magnitude of ϕb0 is more than 10x greater than ζ for Gr/Si and ∼5x greater for Gr/GaAs junctions, the term ηϕb0 is much larger than ζ(η-1), hence ϕb0 ∼ ϕbf/η. This leads to two observations. First, the flat band barrier height ϕbf is always greater than the zero bias value ϕb0 since η is greater than one, consistent with experimental data. Second, in the limits when η is small (or large), e.g.,
