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Towards Barrier Free Contact to Molybdenum Disulfide using Graphene Electrodes Yuan Liu, Hao Wu, Hung Chieh Cheng, Sen Yang, Enbo Zhu, Qiyuan He, Mengning Ding, Dehui Li, Jian Guo, Nathan Weiss, Yu Huang, and Xiangfeng Duan Nano Lett., Just Accepted Manuscript • DOI: 10.1021/nl504957p • Publication Date (Web): 16 Apr 2015 Downloaded from http://pubs.acs.org on April 17, 2015

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Towards Barrier Free Contact to Molybdenum 5

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Disulfide using Graphene Electrodes 8

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Yuan Liu,†,|| Hao Wu,†,|| Hung-Chieh Cheng,†,|| Sen Yang,† Enbo Zhu,† Qiyuan He,‡ Mengning 13

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Ding,† Dehui Li,‡ Jian Guo,† Nathan O Weiss,† Yu Huang,†,§,* and Xiangfeng Duan‡,§,* 14 15 16 †

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Department of Materials Science and Engineering, University of California, Los Angeles, CA

90095, USA; ‡Department of Chemistry and Biochemistry, University of California, Los 21

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Angeles, CA 90095, USA; §California Nanosystems Institute, University of California, Los 2 24

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Angeles, CA 90095, USA; 25 27

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Abstract: Two-dimensional (2D) layered semiconductors such as molybdenum disulfide (MoS2) 28 30

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have attracted tremendous interest as a new class of electronic materials. However, there are 32

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considerable challenges in making reliable contacts to these atomically thin materials. Here we 34

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present a new strategy by using graphene as the back electrodes to achieve Ohmic contact to 35 37

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MoS2. With a finite density of states, the Fermi level of graphene can be readily tuned by a gate 39

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potential to enable a nearly perfect band alignment with MoS2. We demonstrate, for the first 40 41

time, a transparent contact to MoS2 with zero contact barrier and linear output behaviour at 42 4

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cryogenic temperatures (down to 1.9 K) for both monolayer and multilayer MoS2. Benefiting 46

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from the barrier-free transparent contacts, we show that a metal-insulator-transition (MIT) can be 47 48

observed in a two-terminal MoS2 device, a phenomenon that could be easily masked by Schottky 49 51

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barriers found in conventional metal-contacted MoS2 devices. With further passivation by boron 53

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nitride (BN) encapsulation, we demonstrate a record-high extrinsic (two-terminal) field effect 54 5

mobility up to 1300 cm2/V s in MoS2 at low temperature. 57

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KEYWORDS: MoS2, layered materials, graphene contact, barrier free, Ohmic contact, high 5

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mobility 6 7 9

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Two-dimensional (2D) layered semiconductors such as molybdenum disulfide (MoS2) 1

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are of considerable interest for a new generation of ultrathin electronics and optoelectornics.1-11 12 13

However, their promises have been largely stalled by the difficulties in making optimized metal 14 16

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contacts to these atomically thin materials. Substantial efforts have been devoted towards 18

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addressing this challenge by using low work function metal electrodes, high temperature 20

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annealing, or phase engineering.12-22 Although some of these approaches have successfully 21 23

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reduced the contact resistance, it is not yet possible to achieve linear Ohmic contact particularly 25

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at low temperature, where a finite Schottky barrier dominates the carrier transport due to Fermi 26 27

level pinning at conventional metal-MoS2 interface.16 This contact barrier prevents fundamental 30

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investigation of the intrinsic charge transport properties in these atomically thin semiconductors 32

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and poses a serious challenge towards optimized device performance. 3 35

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Herein we present a new strategy by using graphene as a tunable contact for achieving an 36 38

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Ohmic contact to 2D semiconductors. With a finite density of states, the Fermi level of graphene 40

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can be readily modified by a gate potential to ensure a nearly perfect match with MoS2 when in 42

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the ON-state. We demonstrate graphene can make a transparent contact to MoS2 under a proper 43 45

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gate voltage, thus achieving essentially zero barrier and linear output behaviour at cryogenic 47

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temperatures (down to 1.9 K). Furthermore, benefited from the minimized contact barrier, our 49

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device displays a record high extrinsic (two-terminal) field effect mobility up to 1300 cm2/V·s at 50 52

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low temperature. We believe our strategy of using graphene as a barrier-free contact could shed 54

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light on contact engineering in atomically thin semiconductors as well as other conventional 5 56

semiconductors in general. 57 58 59 60 ACS Paragon Plus Environment

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Figure 1. Device schematics and structural characterizations. (a) Perspective and cross-sectional schematics of MoS2 device structure with bottom-graphene electrodes. (b) Optical image of two graphene strips placed close to each other (top panel) and the final device after MoS2 transfer and metal electrode deposition (bottom panel). (c) Cross-sectional TEM image of the graphene-MoS2 interface, indicating the ultraclean and sharp interface resulted from the dry transfer technique. 18

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To fabricate our devices, two strips of single layer graphene are first mechanically 2

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exfoliated onto a silicon/silicon dioxide (300 nm) substrate and used as the back contact 23 25

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electrodes, with the distance between these two graphene strips defining the channel length of 27

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the device (Fig. 1a). Next, a mechanically exfoliated monolayer or multi-layer MoS2 (confirmed 28 29

by PL in Fig. S1) strip is directly transferred on top of two graphene electrodes, using a dry 30 32

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alignment transfer technique (see Method section and Fig. S2). This direct integration of 34

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exfoliated graphene contact with the exfoliated MoS2 without contacting any other material is 35 36

essential for avoiding lithography/etching process introduced polymeric residues that can 37 39

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adversely impact the charge transport behaviour across the graphene/MoS2 vertical contact. The 41

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residue-free dry transfer method provides an atomically sharp and ultraclean interface between 42 43

graphene and MoS2 (Supporting information Fig. S2), which can ensure pure van der Waals 4 46

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contacts and minimize defects and charge trapping sites. Finally, Cr/Au thin film (10/50 nm) 48

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electrodes are used to contact graphene to yield the final device with standard e-beam 49 51

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lithography, metal deposition and lift-off processes (Fig. 1b). A cross sectional transmission 53

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electron microscope (TEM) images of the graphene/MoS2 stack show atomically smooth 54 5

interfaces (Fig. 1c). 56 57 58 59 60 ACS Paragon Plus Environment

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Figure 2. Output characteristics of MoS2 devices contacted by graphene. (a), (b),Output characteristics of a monolayer MoS2 device at room temperature (a) and low temperature (1.9 K) (b) at varying gate voltages. Linear I-V behaviour is observed in both cases, particularly at high positive gate voltages. Gate voltages range from -60 V to 80 V with a 20 V step. (c), (d), Output characteristics of a multilayer MoS2 device at room temperature (c) and low temperature (1.9 K) (d). Linear I-V behaviour is observed in both cases, particularly at high positive gate voltages. Gate voltages range from -60 V to 60 V with a 20 V step. 31

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All electrical transport studies are carried out in a dark environment. Figure 2a and 2c 35

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shows standard I-V output characteristics at room temperature for monolayer and multilayer 37

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MoS2 (20 to 30 layers) with similar W/L ratios around 1. Without any post-fabrication annealing 38 40

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process, our devices exhibit linear I-V output characteristic in both cases. As the temperature is 42

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lowered down to 1.9 K, a slight non-linearity is observed near zero source-drain bias at small 43 4

gate voltages (< 40 V). Nonetheless, it is important to note that the linear I-V and Ohmic 45 47

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behaviour remains when the gate voltage is sufficiently high (80 V for monolayer and 60 V for 49

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multilayer) (Fig. 2b, d), suggesting a transparent and barrier free contact for MoS2 at cryogenic 50 51

temperatures under such gate voltages. This behaviour is observed in all of our devices (over 20 52 54

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samples) with additional data at different temperatures shown in supplementary information S3 56

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and S4. To the best of our knowledge, this low temperature Ohmic contact behaviour has never 57 58 59 60 ACS Paragon Plus Environment

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been achieved before. The closest case is a high-temperature annealed titanium contact in which 5

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obvious nonlinear behaviour is still observed at 5 K.20 6 8

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The excellent contact in our devices may be attributed to two reasons. First, due to the 9 10

unique linear dispersion relationship with a finite density of states in the vicinity of graphene’s K 1 13

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points, the Fermi level could be easily shifted by the gate voltage and result in a perfect band 15

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matching with MoS2.23,24 With 80 V gate voltage, the work function of graphene could be shifted 16 17

up to ~4.15 eV,25 which is lower than the electron affinity of MoS2 (~4.2 eV).26 The tunable 20

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work function provides an excellent band match, leading to a barrier-free contact. The barrier 2

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free behaviour is further confirmed using an Arrhenius plot of ln(Id/T2) versus 1000/T, where a 23 25

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Schottky barrier height of zero can be extracted from the slope (Fig. S5). Second, compared with 27

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conventional metal-MoS2 systems, our dry-transfer integration strategy does not involve E-beam 28 29

lithography and metal deposition processes on top of the MoS2 contact area, which could leave 30 32

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residue and damage the underlying MoS2. Unlike metals, graphene is highly inert and stable 34

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without any diffusion or reaction with MoS2.18,27 This non-damaging van der Waals bonding 35 36

approach provides an atomically sharp and ultraclean interface between graphene and MoS2 to 37 39

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minimize defects, reduce interface charge trapping states, and prevent Fermi level pinning, 41

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which dominate the contact behaviour in conventional metal-MoS2 systems.16,18 It should be 42 43

noted that graphene has been previously used as the contact electrodes on top of MoS2,28-31 but 46

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typically with an obvious contact barrier likely due to lithography induced residues at the 47 48

interface and partial screening of the electrical field by MoS2 (especially thick layers) below the 49 50

graphene.32 52

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Figure 3. Transfer characteristics of MoS2 devices contacted by graphene. (a), Transfer characteristics of a monolayer device, at various temperatures (300 K to 1.9 K with 20 K steps). Vds is 100 mV. (b) The corresponding sheet conductivity of the monolayer device shown in a at different gate voltages (10V to 80 V with a 10 V step). (c), Transfer characteristics of a multilayer MoS2 device, at various temperatures (300 K to 1.9 K with 20 K step). Vds is 100 mV. (d), The corresponding sheet conductivity of the multilayer device shown in c at different gate voltages from -20 V to 60 V with a 10 V step. 31

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We now examine the transfer characteristic of these devices at various temperature. 34 35

Figure 3a shows a temperature dependent transfer curve of a monolayer MoS2 device. The 36 38

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corresponding temperature dependent sheet conductivity (σ) is plotted in Figure 3b, which can 40

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provide useful information about metallic or insulating behaviour of the device. Our studies 41 43

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show that conductivity decreases with increasing temperature when Vg < 50 V, indicating an 45

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insulating behaviour. On the other hand, with larger gate voltages, the conductivity increases 47

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with decreasing temperature, suggesting the monolayer MoS2 enters metallic state with a critical 48 49

conductivity ~ e2/h. These observations indicate the presence of a metal−insulator transition 52

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(MIT) in the sample, consistent with previous observations in monolayer MoS2.12,20 Benefiting 53 54

from the barrier-free contact, we have observed such MIT in 2-terminal monolayer MoS2 FETs, 5 57

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which could not be observed in conventional metal-MoS2 devices, as shown in Supporting 58 59 60 ACS Paragon Plus Environment

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Information S6. In multi-layer MoS2 devices, similar MIT behaviour is also observed (Fig.3c,d). 5

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The difference is that the critical gate voltage required to enter a metallic state decreases to ~20 6 8

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V, which may be attributed to larger carrier concentration and the smaller band gap in multi10

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layer MoS2. We would like to note the two-terminal MIT have been observed in previous 12

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report,33 but was only achieved by using high dielectric constant ion-liquid as the gate dielectric 13 15

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to ensure sufficient doping in MoS2. To the best of our knowledge, the MIT has not been 17

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observed in two-terminal devices with normal solid gate dielectrics. 18 19 20 21 2 23 24 25 26 27 28 29 30 31 32 3 34 35 36 37 39

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Figure 4. Mobility engineering by BN encapsulation. (a), (d), Extrinsic field effect mobility of monolayer and multilayer MoS2 devices as a function of temperature (300 K to 1.9 K). Linear fitting is used in phonon control region (100 K to 300 K) to extract γ. (b), (e), Extrinsic field effect mobility of monolayer and multilayer devices with top BN encapsulation. (c),(f), Extrinsic field effect mobility of monolayer and multilayer MoS2 devices with bottom and top BN encapsulation, forming a sandwich structure. 46

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With the barrier-free contact, it is possible to approach the optimized device performance 50

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limited only by the intrinsic materials properties. To this end, we have evaluated the two51 52

terminal extrinsic FET mobility based on the transconductance using the equation µ=[dIds/dVbg] 53 5

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× [L/(WCiVds)], where L/W is the ratio between channel length and width (~between 0.5 to 2 in 57

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all devices in Figure 4) and Ci = 1.15× 10-8 F cm-2 is the capacitance between the channel and the 58 59 60 ACS Paragon Plus Environment

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back gate per unit area (300 nm thick SiO2). The back gate capacitance is also confirmed using 5

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Hall measurement (Fig. S7). To gain further insight into the charge scattering mechanism, we 6 8

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have plotted the field-effect mobility of the monolayer and multi-layer MoS2 devices as a 10

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function of temperature in the logarithmic scale. In both monolayer (Fig. 4a) and multilayer (Fig. 1 12

4d) MoS2 devices, the mobility values increase with decreasing temperature. In the phonon 13 14

limited temperature range (100- 300 K), the mobility best fits the expression µ~T-γ, with the 17

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exponent γ around 0.66 to 0.84 for monolayer devices and 1.26 to 1.74 for multi-layers. A power 18 19

law dependence with a positive exponent is indicative of a phonon scattering mechanism, which 20 2

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is consistent with other materials that show band-like transport such as graphene, Bi2Te3 and 24

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other layered materials.34-36 Further decreasing the temperature to 100 - 50 K, the mobility of 25 27

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multilayer devices drops due to impurity scattering, consistent with previous calculations and 29

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measurements.12,19,37 In monolayer device, the mobility is relatively stable in this temperature 31

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range, indicating lower impurity density in the monolayer samples. 32 34

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To further optimize device performance, we have used borne nitride (BN) as the 35 36

encapsulation layer to minimize the extrinsic environmental scattering effect and probe the 37 39

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mobility-limiting scattering mechanism. BN is integrated into the system using a pickup dry 41

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transfer technique to ensure the van der Waals stack is free of polymeric residue or any other 42 43

impurities.38 Figures 4b, e show the mobility versus temperature plots of the monolayer and 46

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multilayer MoS2 devices encapsulated by a top-BN flake (around 30 to 50 layers). The top47 48

encapsulation of BN would not significant change the gate capacitance, and the field-effect 49 51

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carrier mobility can be derived using the same approach described above. Compared with non53

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encapsulated device, the multi-layer device shows a similar trend but with a higher γ value (2.12 5

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vs. 1.92) (Fig. 4e), approaching the value for bulk MoS2.39 On the other hand, the mobility of the 56 57 58 59 60 ACS Paragon Plus Environment

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monolayer device keeps increasing with decreasing temperature with no apparent saturation (Fig. 5

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4b), suggesting that the impurity scattering in monolayers can be largely suppressed using top6 8

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BN encapsulation and the phonon scattering dominates at all temperatures in this case. Overall, 10

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compared to the devices with no BN encapsulation, the mobility values of the top-encapsulated 1 12

devices increase by ~110% for monolayer and ~30% for multi-layer MoS2. The much smaller 13 15

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improvement in multilayer devices can be understood by the existence of the top MoS2 layer that 17

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already functions as a screening layer for extrinsic absorbent scattering sources, resulting in a 18 19

smaller effect from top-BN encapsulation. 20 21 2

Furthermore, we have used both bottom and top BN encapsulation to create sandwiched 23 25

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devices. With bottom BN encapsulation, the effective gate capacitance will vary and can be 27

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obtained by considering the dielectric thicknesses of both the silicon oxide and the underlying 28 29

BN. The monolayer MoS2 shows a similar trend with further mobility increasing up to 328 30 32

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cm2/Vs (Fig. 4c). For the multilayer device, the mobility keeps increasing with decreasing 34

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temperature (without saturation or peak around 80 K observed in Fig. 4e) (Fig. 4f), indicating the 35 36

quenching of impurities by the bottom BN encapsulation layer. This suggests that the bottom 37 39

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substrate phonon scattering could be an important limitation to thick MoS2 devices and the 41

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mobility can thus be increased up to 650 cm2/V s by reducing the substrate scattering effect 42 4

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(Fig.4f). The quenching of surface-phonon scattering can also be confirmed by the decreased γ 46

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value, which is a strong indication of optical phonon damping. Furthermore, comparing the 47 48

monolayer devices (Fig. 4a-c) with multilayer devices (Fig. 4d-f), the exponent γ of the 49 51

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monolayer device measured here is overall considerably lower than that of the multilayer, 53

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suggesting different electron-phonon coupling in the monolayer due to a shift of the band valley 5

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from Γ–K to K and K′.39 Lastly, it should be noted such BN/MoS2/ BN sandwich structure could 57

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only be achieved by using a graphene electrode due to its atomic thickness, further highlighting 5

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the importance of the graphene contact electrode architecture. 6 7 8 9 10 1 12 13 14 15 16 17 18 19 20 21 2 23 24 25 27

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Figure 5. Long channel sandwiched device to reduce the impact of contact resistance. (a), Schematics of a BN/graphene/MoS2/ BN sandwich structure with edge graphene contacts. (b), Optical image of MoS2 strip picked up by the BN layer. (c), Device optical image after device fabrication with edge contacts. (d), Corresponding transfer characteristics of the device shown in c. (e), Corresponding extrinsic field effect mobility of the device shown in c as a function of temperature, with the highest mobility over 1300 cm2/Vs. 34

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Although the contact barrier is minimized, we note that the contact resistance (including 36 38

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graphene resistance) could still limit the apparent carrier mobility determined from the two40

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terminal transistor measurements. To further reduce the impact of contact resistance and 41 42

approach the intrinsic field effect mobility limit, we have fabricated a long channel device with 43 45

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large L/W ratio (35/1.7 µm) using the same BN/MoS2/graphene/BN sandwich structure (Fig. 5a). 47

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The MoS2 here has a thickness of 5 layers. Figures 5b, c show the optical image of a long MoS2 48 50

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strip after being picked up by a large flake of BN and final device with contact electrodes. The 52

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transfer characteristics at different temperatures show that the ON-current increases very rapidly 53 54

with decreasing temperature and the Ion at 1.9 K is 12 times larger than the Ion at 300 K (Fig. 5d). 5 57

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Compared with a regular device geometry (W/L~1), the much larger temperature modulation I1.9 58 59 60 ACS Paragon Plus Environment

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here strongly indicates less contribution from contact resistance in this long channel

device. The field effect mobility can be extracted from the transfer characteristics using the same 6 8

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equation mentioned before by considering both the silicon oxide and BN gate dielectrics. 10

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Importantly, the temperature dependent measurements show that the two-terminal extrinsic 12

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mobility can reach up to 1300 cm2/Vs at 1.9 K (Fig. 5e), which represents, to the best of our 13 15

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knowledge, a record high extrinsic field effect mobility for MoS2 determined from two-terminal 17

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measurement. 18 20

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In summary, we have demonstrated for the first time that a barrier-free contact to MoS2 21 2

can be achieved with Ohmic, linear I-V output behaviour down to1.9 K, by using graphene 23 25

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contact electrodes with atomically clean interfaces. With the transparent Ohmic contacts, we 27

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show a metal-insulator-transition (MIT) can be achieved in two terminal device for both 28 29

monolayer and multi-layer MoS2, and demonstrate a record high extrinsic mobility up to 1300 30 32

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cm2/Vs. We believe our strategy of using graphene as a tunable contact opens up a new pathway 34

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toward contact engineering for 2D semiconductors and other semiconductors in general, and can 35 36

enable new opportunities for future electronics and low temperature quantum transport in 2D 37 39

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materials. 40 42

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Methods 43 45

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Device fabrication. To fabricate the BN sandwiched devices, the bottom BN, graphene strips (as 47

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electrodes), and MoS2 stripes were first peeled on clean silicon/silicon oxide (300 nm) substrate, 48 49

while the top BN was peeled on polymer stack PMMA/PPC (polypropylene carbonate) spun on a 50 52

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silicon wafer. The PMMA/PPC/top BN layer was slowly peeled off from substrate under room 54

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temperature. This PMMA/PPC/top BN stack was used to pick up MoS2 and two graphene 5 56

stripes, sequentially from another substrate. The final PMMA/PPC/top BN/MoS2/graphene stack 57 58 59 60 ACS Paragon Plus Environment

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were alignment transferred on to bottom BN encapsulation layer. No solvent was involved 5

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during the entire transfer process to ensure ultraclean and atomic sharp interface between 6 8

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graphene and MoS2. 9 10 1

Microscopic and electrical characterization. The cross-sectional TEM sample was prepared by 12 13

focused ion beam cutting and was characterized by a TF20 TEM operating at 300 kV. The D.C. 14 15

electrical transport studies were conducted with a probe station at room temperature in vacuum 16 18

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with a computer-controlled analogue-to-digital converter. Temperature dependent measurements 20

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were conducted using a physical properties measurement system (PPMS) by Quantum Design 2

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with a lowest temperature of 1.9 K. 23 24 26

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ASSOCIATED CONTENT 28

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Supporting Information. Detailed experimental process and supplementary information is 29 31

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described. This material is available free of charge via the Internet athttp://pubs.acs.org. 3

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AUTHOR INFORMATION 34 35

Corresponding Author 36 37 *

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E-mail: [email protected]

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Author contribution 42

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These authors contribute equally to this work

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Notes 47

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The authors declare no conflict of interest. 48 50

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ACKNOWLEDGEMENTS 52

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We acknowledge the Nanoelectronics Research Facility (NRF) at UCLA for technical support. 54

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X.D. acknowledges partial support ONRYoung Investigator Award N00014-12-1-0745. Y.H. 5

acknowledges the NIH Director's New Innovator Award Program 1DP2OD007279. 56 57 58 59 60 ACS Paragon Plus Environment

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