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Cite this: Phys. Chem. Chem. Phys., 2014, 16, 16367 Received 24th March 2014, Accepted 27th May 2014
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Non-classical logic inverter coupling a ZnO nanowire-based Schottky barrier transistor and adjacent Schottky diode† Seyed Hossein Hosseini Shokouh, Syed Raza Ali Raza, Hee Sung Lee and Seongil Im*
DOI: 10.1039/c4cp01266f www.rsc.org/pccp
On a single ZnO nanowire (NW), we fabricated an inverter-type device comprising a Schottky diode (SD) and field-effect transistor (FET), aiming at 1-dimensional (1D) electronic circuits with low power consumption. The SD and adjacent FET worked respectively as the load and driver, so that voltage signals could be easily extracted as the output. In addition, NW FET with a transparent conducting oxide as top gate turned out to be very photosensitive, although ZnO NW SD was blind to visible light. Based on this, we could achieve an array of photo-inverter cells on one NW. Our nonclassical inverter is regarded as quite practical for both logic and photo-sensing due to its performance as well as simple device configuration.
ZnO nanowire (NW) has been the subject of intense research as a one-dimensional (1D) semiconductor, because it has great potential for nanoscale electronic and optoelectronic device applications due to its wide direct band gap1,2 and the easiness of making an ohmic contact with a variety of metals.3 ZnO NW-based field-effect transistors (FETs) and Schottky diodes (SDs) are fundamental components for realizing 1D nanoelectronics. The individual devices are even useful for ultraviolet (UV) sensors.4–14 On the one hand, it is obvious that any single NW device is not very practical by itself and must be connected to other components to realise an integrated device unit in the same wire. Based on this integration concept along with a basic photosensitivity analysis on a single ZnO NW FET, we previously suggested and made a few types of integration approach: dynamic rectifier circuits using two ZnO NW Schottky diodes (SDs),15 ZnO NW FETs-based logic,16 and UV sensing circuits.17,18 According to these studies, ZnO NW Schottky diode circuits appeared to be relatively insensitive to visible photons, while ZnO NW FET was very photo-sensitive when we used a transparent conducting oxide as the transistor
Department of Physics, Yonsei University, Seoul 120-749, Korea. E-mail: [email protected]; Fax: +82-2-392-1592; Tel: +82-2-2123-2842 † Electronic supplementary information (ESI) available. See DOI: 10.1039/ c4cp01266f
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top gate to receive visible light, which excited the trapped charges at the ZnO nanowire/dielectric oxide interface. Despite the above research achievements, ZnO or other NW FETs still have several issues to resolve: relatively slow gate dynamics of NW FET-based logic inverters, large power consumption of the inverter, and device-to-device isolation. Inverters are building blocks of integrated circuits, and complementary inverters with both n- and p-channel transistors have an inherent characteristic of low power consumption. However, many important nanowire semiconductor materials, such as ZnO, CdS, and CdSe, are unipolar materials, exhibiting only one type of conductivity. This limits their applications for low power consumption performance. In the present work, we coupled two back-to back Schottky diodes on the same ZnO NW but one of these diodes was transformed to a top gate-controlled FET by atomic layer deposited (ALD) Al2O3 with a transparent conductive gate. As a result, this non-classical device configuration could simply operate as an inverter with Schottky-barrier (SB) FET and SD respectively as the driver and load. The Schottky barrier limits the drain current of the transistor,19 which reduces power consumption in the inverter operation. Moreover, by applying proper gate voltages, the non-classical device works as a photo-sensing inverter (photo-inverter), since the SB FET with a transparent top gate sensitively detects visible light, while the Schottky diode acts simply as a light-insensitive load resistor. We thus regard our unique device configuration as quite useful for both low power logic-inverter and photo-inverter applications. For fabricating the non-classical ZnO NW-based inverter, we coupled one FET with one SD. 200 nm-thick SiO2/p+-Si wafers were used as substrates for the photo-inverter. The substrates were ultrasonically cleaned for 15 minutes in each of acetone, methyl alcohol, and de-ionized water. The ZnO NWs were synthesized by carbothermal reduction on a sapphire substrate.20 These NWs were cut off from the sapphire substrate and dispersed into isopropyl alcohol (IPA). To dispose the NWs on the substrate, the dispersion containing NWs was dropped and dried on the surface of the oxygen plasma-treated substrate. Under an optical microscope, a randomly-dispersed but long
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NW was chosen, and then ohmic electrodes (Au/Ti) were patterned onto the NW using a photo-lithography process. After drying the NW solution, the samples were spin-coated with LiftOff-Layer solution (LOL: LOL 2000, Micro Chemical) to easily remove the photoresist (PR: SPR 3612, Micro Chemical) prior to PR spin-coating, and the LOL-coated substrate was thermally cured at 115 1C for 2 min. Then the PR layer (as the second layer) was coated and baked at 95 1C for 2 min. The samples were exposed to UV light for 5 s under a photo-mask aligner with source/drain pattern photo-mask. The samples were subsequently patterned with metal-ion-free (MIF) developer solution and 50 nm-thick Ti and 50 nm-thick Au layers (Au/Ti) for ohmic electrodes were sequentially deposited using a DC-magnetron sputtering system, which was followed by a lift-off process. For the lift-off process, acetone and LOL remover solvents were used. The same process was carried out to form Schottky electrodes of 100 nm-thick Ni deposited by E-beam onto ZnO nanowire. In order to fabricate the top-gate FET, we deposited 30 nm-thick ALD Al2O3 for the dielectric layer at 100 1C. Finally 100 nm-thick indium tin oxide (ITO) was formed as the transparent gate electrode, by way of a similar lift-off process to that implemented for the SD electrodes. The channel length, L, of ZnO NW FET was 5 mm, while the ZnO NW thickness was B200 nm. Fig. 1(a–c) show the three-dimensional (3D) schematic and microscopy images (optical and HRSEM) of our electrical/photo-inverter fabricated on a single NW, which has a linear array of Schottky diode and adjacent SB FET with ITO gate (SD/SB FET cell). For simple device integration, the ALD dielectric oxide covers the whole area and the transparent ITO gate alternatively covers the FET area, so that our electrical/photo-inverter cells may work in each location without any failure (inverter circuit is depicted in
Fig. 1 (a) Schematic of one non-classical inverter set composed of a visible light-sensitive FET with 30 nm-thick Al2O3 and photo-insensitive Schottky diodes S and D: SB indicating source and drain of SB-FET, respectively, while G shows the gate electrode. (b) Optical microscope image of four non-classical photo-inverter sets integrated on the same nanowire. (c) SEM image of top gate FET and adjacent Schottky diode; the diameter of the ZnO NW is around 200 nm. The voltage circuit is overlaid on the SEM image, while the Schottky diode is under a reverse bias.
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the inset of the SEM image). All characterization of the devices was performed in the dark at room temperature using a semiconductor parameter analyzer (HP4155C, Agilent Technologies). For dynamic/transient photo-current measurements the semiconductor parameter analyzer (HP4155C, Agilent Technologies) was again used, accompanied by a function generator (AFG 310, Tektronix) for positive pulse recovery. A high resolution scanning electron microscope (HRSEM) was used for the imaging and size measurements of our ZnO NW FETs. Fig. 2(a) shows the linear and logarithmic scale plots of current–voltage (I–V) characteristics of the NW Schottky diode,
Fig. 2 (a) Current–voltage curve of ZnO NW/Ni Schottky diode in linear and logarithmic scales. (b) The drain current–gate voltage (ID–VG) transfer curve of the NW SB FET at source–drain voltage VDS of 1 V; IG is the gate leakage current. (c) Voltage transfer curve of the inverter at a supply voltage VDD of 3 V, where the circuit configuration is shown in the inset along with the SEM image of the NW inverter.
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where 0.35 mA is observed as the on-current at 3 V bias voltage. The ON/OFF ratio is around 100, while the ideality factor of the diode is estimated to be 1.24. Fig. 2(b) shows the drain current– gate voltage (ID–VG) transfer curve of the NW SB FET at sourcedrain voltage (VDS) of 1 V. The on-current of the NW FET is the same as that of the NW SD at a bias voltage of 1 V, as compared from Fig. 2(a). In consideration of more practical applications, we integrated the Schottky diode and adjacent SB FET to form an inverter, and the electrical property results from our inverter are displayed in Fig. 2(c), where the circuit configuration is inset along with the SEM image of the NW inverter. The resistive-load SD is reverse-biased at a supply voltage VDD of 3 V while the other SD which is to act as FET with the gate charging is forward-biased. The inverter operation was then confirmed by sweeping the gate voltage, VGS (=VIN, the input voltage of the driver), resulting in the voltage transfer curve (VTC) of Fig. 2(c), according to which the voltage gain (= dVOUT/dVIN) appears to be B8. The reverse-biased Schottky diode limits the inverter current to less than 10 nA at VDD = 3 V, resulting in a low power consumption of less than 30 nW, which is in fact almost 100 times lower than that of our classical ZnO NW inverter with a similar channel thickness and length (ESI,† Fig. S1). Dynamic behavior of this VTC was also observed in the time domain. We characterized the inverter dynamics under three different input (VIN) modulation frequencies as in Fig. 3(a–c), where the voltage (VOUT) dynamics for 10 and 100 Hz square waves of VIN demonstrate much superior performance to that of our classical ZnO NW inverter, which could operate only under B10 Hz (ESI,† Fig. S2). Such apparent improvement in the gating speed of our non-classical inverter might be attributed to the fast charge depletion behavior by Schottky effects on the drain region.19 For a high frequency of 0.5 kHz the output signal is no longer a square wave but is a little distorted, revealing a minimum rising time of B1 ms due to RC delay in the circuit (Fig. 3(c)). Nonetheless, in both respects of inverter speed and power consumption, our non-classical device is still regarded as advantageous over the classical ZnO NW inverter. As the other main application besides the electrical inverter, the photo-sensing properties of our inverter were characterized under green and blue light-emitting diodes (LEDs; optical power was almost the same for both LEDs, estimated to be 1.45–1.5 mW). According to the I–V curves of Fig. 4(a and b), the NW SD appears insensitive to visible light, while SB FET shows a light-induced threshold voltage shift. The photo-insensitivity of the ZnO SD is quite expected, since the area of the nanowire exposed to visible light is almost outside of the electric (E)-field as depicted by the illustrations for the 3D scheme and energy band diagram in Fig. 4(a). According to the band diagram, photo-excited electrons would not be collected in the NW in the absence of the E-field, but would be easily recombined with their original trap sites such as oxygen vacancies (VO). However, the SB FET in the ZnO NW is a completely different situation, since the NW area exposed to the visible photons is now under an E-field induced by negative gate voltage, as illustrated by another band diagram and inset 3D scheme in Fig. 4(b). Under illumination, deep neutral oxygen vacancy states (VO) are photo-ionized or excited to shallow donor
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Fig. 3 Output voltage dynamics for square wave input voltages with maximum (minimum) + 2 V ( 2 V) at (a) 10 Hz (b) 100 Hz, and (c) 0.5 kHz modulated frequency for a supply voltage VDD of 2 V.
+ 21–23 states (V++ and photo-released electron O ) or less deep states (VO), charges are collected by the drain as the signal. It is already known from our previous results that classical ZnO NW FET with ALD dielectric oxide can detect green and blue visible photons, since the dielectric/ZnO NW channel interface has a trap density of states at the corresponding spectral energies (l o 550 nm).17 Fig. 4(c) again illustrates such carrier collection in the drain. Generation and collection of these deep-trapped electrons under illumination is further illustrated by a 3D band diagram in the ESI,† Fig. S3. For more practical applications of such photo-effects on the FET, the signal of Fig. 4(c) was now converted to a voltage output (VOUT) when the FET was incorporated into the inverter circuit. According to the inverter VTC curves of Fig. 5(a), the initial dark transition voltage changed from 1.2 to 4 V by illumination, which is attributed to the threshold voltage shift in
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Fig. 4 (a) Current–voltage curve of ZnO NW/Ni Schottky diode under green and blue LEDs, which indicates the photo-insensitivity of the SD. The 3D scheme and energy band diagram illustrate the reason for this insensitivity. (b) Transfer curves of ZnO NW SB FET under green and blue LED illumination. The NW area exposed to the visible photons is now under an E-field induced by negative gate voltage, as illustrated by the band diagram and inset 3D scheme. (c) Band diagram of source/drain electrodes of SB FET under illumination; VO are photo-ionized/excited to shallow donor states (V++ O ) or less deep states (V+ O) while photo-released electrons are collected by the drain as the signal.
the transfer curves of Fig. 4(b). The photo-induced voltage signals could be dynamically recorded under the following conditions: repeating ON-and-OFF green and blue LED illumination under a fixed VIN of 2.5 V and supply voltage (VDD) of 3 V.
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However, a decent photo-inverting dynamic output was not easy to achieve, as shown in Fig. 5(b), where persistent photo-conductivity (PPC) phenomena are instead observed. The PPC is attributed to the interfacial traps and bulk traps respectively
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Fig. 5 (a) Voltage transfer curve of inverter under green and blue LED illumination. (b) Photo-induced inverter dynamics under periodic illumination by green and blue LEDs (see the light waveform) at fixed input voltage Vin = 2.5 V and VDD = 3 V. (c) Photo-induced inverter dynamics recorded with the same LED switching and bias conditions of (a), but also with an additional periodic gate pulse up to +10 V (width 100 ms) from the initial 2.5 V (see the input voltage wave form). The inset is a band diagram under positive gate voltage pulse (accumulation) after the light was switched off.
located at the ZnO NW/Al2O3 interface and the ZnO NW channel itself. In the present work, this PPC issue is effectively resolved by using a short accumulation (on-state) voltage pulse, as clearly shown in Fig. 5(c); see the schematic wave of constant gate voltage (at 2.5 V) but with a gate pulse (at +10 V) under a period of visible light illumination. This PPC-removing pulse effect was slightly more effective in the case of green photon detection, since blue photons may excite a higher density of interface traps (or be detected more sensitively than green photons:17 Fig. 4(b)) leading to more PPC issues. It is not too surprising to see that such a persistent current could drop completely to the initial off-state level (by less than 100 ms-short gate pulse). The PPC in ZnO thin film or NW is usually linked to the oxygen desorption under UV light and then slow re-adsorption,24,25 but here the NW is passivated by ALD oxide and excited by visible light, so the oxygen adsorption may not be the reason for the PPC. We thus explain this pulse-induced effect with the band diagram in Fig. 5(c). Since the ZnO NWs are essentially single-crystalline26,27 we assume that a high density of intrinsic oxygen vacancy-related defects/traps – termed VO, V+O and V++ O vacancies based on their charge state – are mostly located at the ZnO/Al2O3 interface.28 The V++ O state is
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metastable in general, taking a long time to recover to its original state (VO). This means that the recombination between V++ O and excited electrons takes a long time without illumination, causing the excited electrons to still contribute to the dark ID, which leads to the slow response in VOUT dynamics. Here, we applied a short positive (+10 V) gate pulse to accumulate electrons at the interface region and hence simultaneously accelerate the recombination process. The short pulse would force the electrons to recombine with V++ O , so that the trap-induced ID would fall to the initial dark value.22 As a result, we consider that the SD/SB FET photo-inverter cell works reasonably well as a green and blue light detector. Our detector also senses UV light, but we do not discuss the UV detection results here since UV sensing by band-to-band transitions in ZnO is already well known.29
Conclusions In summary, we have fabricated a ZnO NW-based photo-inverter cell by coupling two back-to-back Schottky diodes on the same ZnO NW, where one diode becomes a top gate-controlled SB FET
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with ALD Al2O3 and ITO gate for the driver, while the other stays as a SD to act as the load. Our non-classical inverter operates not just as an electrical device at 0.5 kHz gating frequency with low power consumption, but also works as a visible light-sensing device under an appropriate VIN, since the SB FET with transparent top gate sensitively detects visible light, while the Schottky diode acts simply as a light-insensitive load resistor. We conclude that our non-classical NW inverter is promising and practical due to its simple configuration, low power consumption, and high inverting speed.
Acknowledgements The authors acknowledge financial support from NRF (NRL program: Grant No. 2009-0079462), Nanomaterial Technology Development Program through the NRF of Korea (Grant No. 2012M3A7B4034985) and Brain Korea 21 Plus Program.
References 1 A. B. Djurisˇic´ and Y. H. Leung, Small, 2006, 2, 944–961. ¨hle, L. K. Van Vugt, H.-Y. Li, N. A. Keizer, L. Kuipers 2 S. Ru and D. Vanmaekelbergh, Nano Lett., 2008, 8, 119–123. 3 L. J. Brillson and Y. Lu, J. Appl. Phys., 2011, 109, 121301. 4 S. N. Das, J. P. Kar, J.-H. Choi, T. I. Lee, K.-J. Moon and J.-M. Myoung, J. Phys. Chem. C, 2010, 114, 1689–1693. 5 Y. W. Heo, D. P. Norton, L. C. Tien, Y. Kwon, B. S. Kang, F. Ren, S. J. Pearton and J. R. LaRoche, Mater. Sci. Eng., R, 2004, 47, 1–47. 6 Y. W. Heo, L. C. Tien, D. P. Norton, S. J. Pearton, B. S. Kang, F. Ren and J. R. LaRoche, Appl. Phys. Lett., 2004, 85, 3107–3109. 7 J. Kim, J.-H. Yun, C. H. Kim, Y. C. Park, J. Y. Woo, J. Park, J.-H. Lee, J. Yi and C.-S. Han, Nanotechnology, 2010, 21, 115205. 8 H. Kind, H. Yan, B. Messer, M. Law and P. Yang, Adv. Mater., 2002, 14, 158. 9 S. Kumar, V. Gupta and K. Sreenivas, Nanotechnology, 2005, 16, 1167. 10 O. Lupan, G. Chai and L. Chow, Microelectron. J., 2007, 38, 1211–1216. 11 O. Lupan, L. Chow, G. Chai, L. Chernyak, O. LopatiukTirpak and H. Heinrich, Phys. Status Solidi A, 2008, 205, 2673–2678.
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12 C. Soci, A. Zhang, B. Xiang, S. A. Dayeh, D. P. R. Aplin, J. Park, X. Y. Bao, Y.-H. Lo and D. Wang, Nano Lett., 2007, 7, 1003–1009. 13 H.-T. Wang, B. S. Kang, F. Ren, L. C. Tien, P. W. Sadik, D. P. Norton, S. J. Pearton and J. Lin, Appl. Phys. Lett., 2005, 86, 243503. 14 J. Zhou, Y. Gu, Y. Hu, W. Mai, P.-H. Yeh, G. Bao, A. K. Sood, D. L. Polla and Z. L. Wang, Appl. Phys. Lett., 2009, 94, 191103. 15 B. Ryu, Y. T. Lee, K. H. Lee, R. Ha, J. H. Park, H.-J. Choi and S. Im, Nano Lett., 2011, 11, 4246–4250. 16 Y. T. Lee, S. R. Ali Raza, P. J. Jeon, R. Ha, H.-J. Choi and S. Im, Nanoscale, 2013, 5, 4181–4185. 17 S. R. Ali Raza, P. J. Jeon, J. H. Kim, R. Ha, H.-J. Choi and S. Im, Phys. Chem. Chem. Phys., 2013, 15, 2660–2664. 18 S. R. Ali Raza, Y. T. Lee, S. H. Hosseini Shokouh, R. Ha, H. J. Choi and S. Im, Nanoscale, 2013, 5, 10829–10834. 19 A. H. Adl, A. Ma, M. Gupta, M. Benlamri, Y. Y. Tsui, D. W. Barlage and K. Shankar, ACS Appl. Mater. Interfaces, 2012, 4, 1423–1428. 20 Y. T. Lee, S. Im, R. Ha and H.-J. Choi, Appl. Phys. Lett., 2010, 97, 123506. 21 A. Janotti and C. G. Van de Walle, Appl. Phys. Lett., 2005, 87, 122102. 22 S. Jeon, S.-E. Ahn, I. Song, C. J. Kim, U.-I. Chung, E. Lee, I. Yoo, A. Nathan, S. Lee, J. Robertson and K. Kim, Nat. Mater., 2012, 11, 301–305. 23 S. Lany and A. Zunger, Phys. Rev. B: Condens. Matter Mater. Phys., 2005, 72, 035215. ´ndez-Ramı´rez, R. Jimenez-Diaz, 24 J. D. Prades, F. Herna M. Manzanares, T. Andreu, A. Cirera, A. Romano-Rodriguez and J. Morante, Nanotechnology, 2008, 19, 465501. 25 B. Weintraub, Z. Zhou, Y. Li and Y. Deng, Nanoscale, 2010, 2, 1573–1587. 26 M. H. Huang, S. Mao, H. Feick, H. Yan, Y. Wu, H. Kind, E. Weber, R. Russo and P. Yang, Science, 2001, 292, 1897–1899. 27 Y. Tak and K. Yong, J. Phys. Chem. B, 2005, 109, 19263–19269. 28 R. M. Sheetz, I. Ponomareva, E. Richter, A. N. Andriotis and M. Menon, Phys. Rev. B: Condens. Matter Mater. Phys., 2009, 80, 195314. 29 G. Cheng, X. Wu, B. Liu, B. Li, X. Zhang and Z. Du, Appl. Phys. Lett., 2011, 99, 203105.
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Cite this: Phys. Chem. Chem. Phys., 2014, 16, 16367 Received 24th March 2014, Accepted 27th May 2014
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Non-classical logic inverter coupling a ZnO nanowire-based Schottky barrier transistor and adjacent Schottky diode† Seyed Hossein Hosseini Shokouh, Syed Raza Ali Raza, Hee Sung Lee and Seongil Im*
DOI: 10.1039/c4cp01266f www.rsc.org/pccp
On a single ZnO nanowire (NW), we fabricated an inverter-type device comprising a Schottky diode (SD) and field-effect transistor (FET), aiming at 1-dimensional (1D) electronic circuits with low power consumption. The SD and adjacent FET worked respectively as the load and driver, so that voltage signals could be easily extracted as the output. In addition, NW FET with a transparent conducting oxide as top gate turned out to be very photosensitive, although ZnO NW SD was blind to visible light. Based on this, we could achieve an array of photo-inverter cells on one NW. Our nonclassical inverter is regarded as quite practical for both logic and photo-sensing due to its performance as well as simple device configuration.
ZnO nanowire (NW) has been the subject of intense research as a one-dimensional (1D) semiconductor, because it has great potential for nanoscale electronic and optoelectronic device applications due to its wide direct band gap1,2 and the easiness of making an ohmic contact with a variety of metals.3 ZnO NW-based field-effect transistors (FETs) and Schottky diodes (SDs) are fundamental components for realizing 1D nanoelectronics. The individual devices are even useful for ultraviolet (UV) sensors.4–14 On the one hand, it is obvious that any single NW device is not very practical by itself and must be connected to other components to realise an integrated device unit in the same wire. Based on this integration concept along with a basic photosensitivity analysis on a single ZnO NW FET, we previously suggested and made a few types of integration approach: dynamic rectifier circuits using two ZnO NW Schottky diodes (SDs),15 ZnO NW FETs-based logic,16 and UV sensing circuits.17,18 According to these studies, ZnO NW Schottky diode circuits appeared to be relatively insensitive to visible photons, while ZnO NW FET was very photo-sensitive when we used a transparent conducting oxide as the transistor
Department of Physics, Yonsei University, Seoul 120-749, Korea. E-mail: [email protected]; Fax: +82-2-392-1592; Tel: +82-2-2123-2842 † Electronic supplementary information (ESI) available. See DOI: 10.1039/ c4cp01266f
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top gate to receive visible light, which excited the trapped charges at the ZnO nanowire/dielectric oxide interface. Despite the above research achievements, ZnO or other NW FETs still have several issues to resolve: relatively slow gate dynamics of NW FET-based logic inverters, large power consumption of the inverter, and device-to-device isolation. Inverters are building blocks of integrated circuits, and complementary inverters with both n- and p-channel transistors have an inherent characteristic of low power consumption. However, many important nanowire semiconductor materials, such as ZnO, CdS, and CdSe, are unipolar materials, exhibiting only one type of conductivity. This limits their applications for low power consumption performance. In the present work, we coupled two back-to back Schottky diodes on the same ZnO NW but one of these diodes was transformed to a top gate-controlled FET by atomic layer deposited (ALD) Al2O3 with a transparent conductive gate. As a result, this non-classical device configuration could simply operate as an inverter with Schottky-barrier (SB) FET and SD respectively as the driver and load. The Schottky barrier limits the drain current of the transistor,19 which reduces power consumption in the inverter operation. Moreover, by applying proper gate voltages, the non-classical device works as a photo-sensing inverter (photo-inverter), since the SB FET with a transparent top gate sensitively detects visible light, while the Schottky diode acts simply as a light-insensitive load resistor. We thus regard our unique device configuration as quite useful for both low power logic-inverter and photo-inverter applications. For fabricating the non-classical ZnO NW-based inverter, we coupled one FET with one SD. 200 nm-thick SiO2/p+-Si wafers were used as substrates for the photo-inverter. The substrates were ultrasonically cleaned for 15 minutes in each of acetone, methyl alcohol, and de-ionized water. The ZnO NWs were synthesized by carbothermal reduction on a sapphire substrate.20 These NWs were cut off from the sapphire substrate and dispersed into isopropyl alcohol (IPA). To dispose the NWs on the substrate, the dispersion containing NWs was dropped and dried on the surface of the oxygen plasma-treated substrate. Under an optical microscope, a randomly-dispersed but long
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NW was chosen, and then ohmic electrodes (Au/Ti) were patterned onto the NW using a photo-lithography process. After drying the NW solution, the samples were spin-coated with LiftOff-Layer solution (LOL: LOL 2000, Micro Chemical) to easily remove the photoresist (PR: SPR 3612, Micro Chemical) prior to PR spin-coating, and the LOL-coated substrate was thermally cured at 115 1C for 2 min. Then the PR layer (as the second layer) was coated and baked at 95 1C for 2 min. The samples were exposed to UV light for 5 s under a photo-mask aligner with source/drain pattern photo-mask. The samples were subsequently patterned with metal-ion-free (MIF) developer solution and 50 nm-thick Ti and 50 nm-thick Au layers (Au/Ti) for ohmic electrodes were sequentially deposited using a DC-magnetron sputtering system, which was followed by a lift-off process. For the lift-off process, acetone and LOL remover solvents were used. The same process was carried out to form Schottky electrodes of 100 nm-thick Ni deposited by E-beam onto ZnO nanowire. In order to fabricate the top-gate FET, we deposited 30 nm-thick ALD Al2O3 for the dielectric layer at 100 1C. Finally 100 nm-thick indium tin oxide (ITO) was formed as the transparent gate electrode, by way of a similar lift-off process to that implemented for the SD electrodes. The channel length, L, of ZnO NW FET was 5 mm, while the ZnO NW thickness was B200 nm. Fig. 1(a–c) show the three-dimensional (3D) schematic and microscopy images (optical and HRSEM) of our electrical/photo-inverter fabricated on a single NW, which has a linear array of Schottky diode and adjacent SB FET with ITO gate (SD/SB FET cell). For simple device integration, the ALD dielectric oxide covers the whole area and the transparent ITO gate alternatively covers the FET area, so that our electrical/photo-inverter cells may work in each location without any failure (inverter circuit is depicted in
Fig. 1 (a) Schematic of one non-classical inverter set composed of a visible light-sensitive FET with 30 nm-thick Al2O3 and photo-insensitive Schottky diodes S and D: SB indicating source and drain of SB-FET, respectively, while G shows the gate electrode. (b) Optical microscope image of four non-classical photo-inverter sets integrated on the same nanowire. (c) SEM image of top gate FET and adjacent Schottky diode; the diameter of the ZnO NW is around 200 nm. The voltage circuit is overlaid on the SEM image, while the Schottky diode is under a reverse bias.
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the inset of the SEM image). All characterization of the devices was performed in the dark at room temperature using a semiconductor parameter analyzer (HP4155C, Agilent Technologies). For dynamic/transient photo-current measurements the semiconductor parameter analyzer (HP4155C, Agilent Technologies) was again used, accompanied by a function generator (AFG 310, Tektronix) for positive pulse recovery. A high resolution scanning electron microscope (HRSEM) was used for the imaging and size measurements of our ZnO NW FETs. Fig. 2(a) shows the linear and logarithmic scale plots of current–voltage (I–V) characteristics of the NW Schottky diode,
Fig. 2 (a) Current–voltage curve of ZnO NW/Ni Schottky diode in linear and logarithmic scales. (b) The drain current–gate voltage (ID–VG) transfer curve of the NW SB FET at source–drain voltage VDS of 1 V; IG is the gate leakage current. (c) Voltage transfer curve of the inverter at a supply voltage VDD of 3 V, where the circuit configuration is shown in the inset along with the SEM image of the NW inverter.
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where 0.35 mA is observed as the on-current at 3 V bias voltage. The ON/OFF ratio is around 100, while the ideality factor of the diode is estimated to be 1.24. Fig. 2(b) shows the drain current– gate voltage (ID–VG) transfer curve of the NW SB FET at sourcedrain voltage (VDS) of 1 V. The on-current of the NW FET is the same as that of the NW SD at a bias voltage of 1 V, as compared from Fig. 2(a). In consideration of more practical applications, we integrated the Schottky diode and adjacent SB FET to form an inverter, and the electrical property results from our inverter are displayed in Fig. 2(c), where the circuit configuration is inset along with the SEM image of the NW inverter. The resistive-load SD is reverse-biased at a supply voltage VDD of 3 V while the other SD which is to act as FET with the gate charging is forward-biased. The inverter operation was then confirmed by sweeping the gate voltage, VGS (=VIN, the input voltage of the driver), resulting in the voltage transfer curve (VTC) of Fig. 2(c), according to which the voltage gain (= dVOUT/dVIN) appears to be B8. The reverse-biased Schottky diode limits the inverter current to less than 10 nA at VDD = 3 V, resulting in a low power consumption of less than 30 nW, which is in fact almost 100 times lower than that of our classical ZnO NW inverter with a similar channel thickness and length (ESI,† Fig. S1). Dynamic behavior of this VTC was also observed in the time domain. We characterized the inverter dynamics under three different input (VIN) modulation frequencies as in Fig. 3(a–c), where the voltage (VOUT) dynamics for 10 and 100 Hz square waves of VIN demonstrate much superior performance to that of our classical ZnO NW inverter, which could operate only under B10 Hz (ESI,† Fig. S2). Such apparent improvement in the gating speed of our non-classical inverter might be attributed to the fast charge depletion behavior by Schottky effects on the drain region.19 For a high frequency of 0.5 kHz the output signal is no longer a square wave but is a little distorted, revealing a minimum rising time of B1 ms due to RC delay in the circuit (Fig. 3(c)). Nonetheless, in both respects of inverter speed and power consumption, our non-classical device is still regarded as advantageous over the classical ZnO NW inverter. As the other main application besides the electrical inverter, the photo-sensing properties of our inverter were characterized under green and blue light-emitting diodes (LEDs; optical power was almost the same for both LEDs, estimated to be 1.45–1.5 mW). According to the I–V curves of Fig. 4(a and b), the NW SD appears insensitive to visible light, while SB FET shows a light-induced threshold voltage shift. The photo-insensitivity of the ZnO SD is quite expected, since the area of the nanowire exposed to visible light is almost outside of the electric (E)-field as depicted by the illustrations for the 3D scheme and energy band diagram in Fig. 4(a). According to the band diagram, photo-excited electrons would not be collected in the NW in the absence of the E-field, but would be easily recombined with their original trap sites such as oxygen vacancies (VO). However, the SB FET in the ZnO NW is a completely different situation, since the NW area exposed to the visible photons is now under an E-field induced by negative gate voltage, as illustrated by another band diagram and inset 3D scheme in Fig. 4(b). Under illumination, deep neutral oxygen vacancy states (VO) are photo-ionized or excited to shallow donor
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Fig. 3 Output voltage dynamics for square wave input voltages with maximum (minimum) + 2 V ( 2 V) at (a) 10 Hz (b) 100 Hz, and (c) 0.5 kHz modulated frequency for a supply voltage VDD of 2 V.
+ 21–23 states (V++ and photo-released electron O ) or less deep states (VO), charges are collected by the drain as the signal. It is already known from our previous results that classical ZnO NW FET with ALD dielectric oxide can detect green and blue visible photons, since the dielectric/ZnO NW channel interface has a trap density of states at the corresponding spectral energies (l o 550 nm).17 Fig. 4(c) again illustrates such carrier collection in the drain. Generation and collection of these deep-trapped electrons under illumination is further illustrated by a 3D band diagram in the ESI,† Fig. S3. For more practical applications of such photo-effects on the FET, the signal of Fig. 4(c) was now converted to a voltage output (VOUT) when the FET was incorporated into the inverter circuit. According to the inverter VTC curves of Fig. 5(a), the initial dark transition voltage changed from 1.2 to 4 V by illumination, which is attributed to the threshold voltage shift in
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Fig. 4 (a) Current–voltage curve of ZnO NW/Ni Schottky diode under green and blue LEDs, which indicates the photo-insensitivity of the SD. The 3D scheme and energy band diagram illustrate the reason for this insensitivity. (b) Transfer curves of ZnO NW SB FET under green and blue LED illumination. The NW area exposed to the visible photons is now under an E-field induced by negative gate voltage, as illustrated by the band diagram and inset 3D scheme. (c) Band diagram of source/drain electrodes of SB FET under illumination; VO are photo-ionized/excited to shallow donor states (V++ O ) or less deep states (V+ O) while photo-released electrons are collected by the drain as the signal.
the transfer curves of Fig. 4(b). The photo-induced voltage signals could be dynamically recorded under the following conditions: repeating ON-and-OFF green and blue LED illumination under a fixed VIN of 2.5 V and supply voltage (VDD) of 3 V.
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However, a decent photo-inverting dynamic output was not easy to achieve, as shown in Fig. 5(b), where persistent photo-conductivity (PPC) phenomena are instead observed. The PPC is attributed to the interfacial traps and bulk traps respectively
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Fig. 5 (a) Voltage transfer curve of inverter under green and blue LED illumination. (b) Photo-induced inverter dynamics under periodic illumination by green and blue LEDs (see the light waveform) at fixed input voltage Vin = 2.5 V and VDD = 3 V. (c) Photo-induced inverter dynamics recorded with the same LED switching and bias conditions of (a), but also with an additional periodic gate pulse up to +10 V (width 100 ms) from the initial 2.5 V (see the input voltage wave form). The inset is a band diagram under positive gate voltage pulse (accumulation) after the light was switched off.
located at the ZnO NW/Al2O3 interface and the ZnO NW channel itself. In the present work, this PPC issue is effectively resolved by using a short accumulation (on-state) voltage pulse, as clearly shown in Fig. 5(c); see the schematic wave of constant gate voltage (at 2.5 V) but with a gate pulse (at +10 V) under a period of visible light illumination. This PPC-removing pulse effect was slightly more effective in the case of green photon detection, since blue photons may excite a higher density of interface traps (or be detected more sensitively than green photons:17 Fig. 4(b)) leading to more PPC issues. It is not too surprising to see that such a persistent current could drop completely to the initial off-state level (by less than 100 ms-short gate pulse). The PPC in ZnO thin film or NW is usually linked to the oxygen desorption under UV light and then slow re-adsorption,24,25 but here the NW is passivated by ALD oxide and excited by visible light, so the oxygen adsorption may not be the reason for the PPC. We thus explain this pulse-induced effect with the band diagram in Fig. 5(c). Since the ZnO NWs are essentially single-crystalline26,27 we assume that a high density of intrinsic oxygen vacancy-related defects/traps – termed VO, V+O and V++ O vacancies based on their charge state – are mostly located at the ZnO/Al2O3 interface.28 The V++ O state is
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metastable in general, taking a long time to recover to its original state (VO). This means that the recombination between V++ O and excited electrons takes a long time without illumination, causing the excited electrons to still contribute to the dark ID, which leads to the slow response in VOUT dynamics. Here, we applied a short positive (+10 V) gate pulse to accumulate electrons at the interface region and hence simultaneously accelerate the recombination process. The short pulse would force the electrons to recombine with V++ O , so that the trap-induced ID would fall to the initial dark value.22 As a result, we consider that the SD/SB FET photo-inverter cell works reasonably well as a green and blue light detector. Our detector also senses UV light, but we do not discuss the UV detection results here since UV sensing by band-to-band transitions in ZnO is already well known.29
Conclusions In summary, we have fabricated a ZnO NW-based photo-inverter cell by coupling two back-to-back Schottky diodes on the same ZnO NW, where one diode becomes a top gate-controlled SB FET
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with ALD Al2O3 and ITO gate for the driver, while the other stays as a SD to act as the load. Our non-classical inverter operates not just as an electrical device at 0.5 kHz gating frequency with low power consumption, but also works as a visible light-sensing device under an appropriate VIN, since the SB FET with transparent top gate sensitively detects visible light, while the Schottky diode acts simply as a light-insensitive load resistor. We conclude that our non-classical NW inverter is promising and practical due to its simple configuration, low power consumption, and high inverting speed.
Acknowledgements The authors acknowledge financial support from NRF (NRL program: Grant No. 2009-0079462), Nanomaterial Technology Development Program through the NRF of Korea (Grant No. 2012M3A7B4034985) and Brain Korea 21 Plus Program.
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